[Question] How to support large page (2K size) operation with only 256/512 page size operation Nand Flash Controller?

[Bryan Wu <bryan.wu@analog.com>]

Hi Folks,

This days I am developing a NAND Flash Controller driver in latest
Blackfin BF54x processor.

The read/write buffer operation without DMA can work now. The NFC
hardware supporting 256/512 page size operation, but my target NAND chip
STMicro's NAND2G (256Mbytes) is 2048 large page size.

After digging into the code (nand_base.c), I found is very difficult to
support this in my driver:

I tried to replace read_page and write_page function with HW DMA
supporting. But the page size is 2K not 256/512, I need split the whole
large page operation to 8 or 4 steps. In every step, DMA will transfer
256 or 512 bytes. 

Before start every HW DMA operation, a NAND_CMD_READ0 command should be
sent to the chip following by a page address. But in my
read_page/write_page function I can't get the page address for
increasing 256/512 page size because of splitting DMA operation.

Any idea about this issue?

Thanks
Best Regards
- Bryan Wu