From mboxrd@z Thu Jan  1 00:00:00 1970
Subject: Re: [patch 1/4] mtd-nand: davinci: Correct 4-bit error correction
From: David Woodhouse <dwmw2@infradead.org>
To: akpm@linux-foundation.org
In-Reply-To: <200911172245.nAHMjk8X001820@imap1.linux-foundation.org>
References: <200911172245.nAHMjk8X001820@imap1.linux-foundation.org>
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Date: Mon, 30 Nov 2009 11:38:04 +0000
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On Tue, 2009-11-17 at 14:45 -0800, akpm@linux-foundation.org wrote:
> +       /*
> +        * ECC_STATE field reads 0x3 (Error correction complete) immediately
> +        * after setting the 4BITECC_ADD_CALC_START bit. So if you immediately
> +        * begin trying to poll for the state, you may fall right out of your
> +        * loop without any of the correction calculations having taken place.
> +        * The recommendation from the hardware team is to wait till ECC_STATE
> +        * reads less than 4, which means ECC HW has entered correction state.
> +        */
> +       do {
> +               ecc_state = (davinci_nand_readl(info,
> +                               NANDFSR_OFFSET) >> 8) & 0x0f;
> +               cpu_relax();
> +       } while (ecc_state < 4); 

Please can this have a timeout. Infinite loops waiting for hardware are
generally a bad idea.

-- 
David Woodhouse                            Open Source Technology Centre
David.Woodhouse@intel.com                              Intel Corporation