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From: David Woodhouse <dwmw2@infradead.org>
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To: Radu Corlan <rcorlan@pcnet.ro>
Cc: Thomas Gleixner <gleixner@autronix.de>,
    linux-mtd@lists.infradead.org, Joerg Zastrau <dl1bku@amsat.org>
Subject: Re: Support for parallel access in nand chips 
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Date: Tue, 26 Feb 2002 01:25:09 +0000
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rcorlan@pcnet.ro said:
>  ok - i was going to make a separate source anyway. Do you know if the
> upper layers mind the 32k erase size?

They'll be fine - it's still smaller than the typical erase size on NOR 
flash.

If you want to run JFFS2 on it, the ECC layout needs to be decided.

--
dwmw2