From: Maxim Levitsky <maximlevitsky@gmail.com>
To: Alex Dubov <oakad@yahoo.com>
Cc: linux-mtd <linux-mtd@lists.infradead.org>
Subject: Re: Legacy memstick support + FTL questions
Date: Tue, 23 Feb 2010 01:11:23 +0200 [thread overview]
Message-ID: <1266880283.32669.8.camel@maxim-laptop> (raw)
In-Reply-To: <597490.7198.qm@web37607.mail.mud.yahoo.com>
On Mon, 2010-02-22 at 06:04 -0800, Alex Dubov wrote:
> >
> > Alex, could you explain how a single TPC is performed?
> >
> > I currently first send MS_TPC_SET_RW_REG_ADRS, and then
> > MS_TPC_READ_REG
> >
> > When I send the TPC I specify both the tpc number and its
> > len. Is the
> > len transmitted?
>
> Of course, it is. How otherwise media would know how many bits to sample
> in?
By watching the #BS?
Every clock cycle media reads 1 or 4 bits, when #BS goes low it stops
reading...
Why otherwise one would need the #BS line?
Thanks for explanation.
>
> >
> > I see that if I set addr.r_length != MS_TPC_READ_REG len, I
> > get errors
> > in reg #16, but different errors depending if i set it
> > lower or higher.
>
> This is an undefined behavior. You're confusing the state machine on the
> media side. By the way, left over bytes from the incorrectly ordered
> or formatted TPC can spill into block data buffer (this will cause an
> apparent data corruption - I've seen this happen).
I know that it is undefined, but I try to understand the meaning of
status flags, thats why I try it. Now it is much clearer to me.
Just one more question, when the host say reads the data buffer (512
bytes), it does so in one run, or it reads it in packets, or it reads it
in 8 byte packets, then waits for some condition (#SDIO maybe)?
>
> >
> > Currently I think that a level change on the #SDIO is the
> > signal for
> > host to start reading, but who sets the #BS to high? Host
> > or card.
>
> BS line is always mastered by host.
Thanks for explanation.
>
> >
> > Does card signal end of transmission?
> >
>
> Yes, on a data line (there's CRC as well, which must be handled by the host
> transparently).
I have seen on some datasheet that crc is involved. It is handled
transparently.
>
> > Also it seems that if I write to 'param' register, I can't
> > read it back
> > (maybe I do something wrong). Is this register write only?
> >
>
> There are no write only registers in the MS spec. Moreover, you need to
> read the param register if you're doing multi-page transfer (page address
> will be updated during the transfer to point to the last accessed page).
Very interesting, probably I do that wrong then.
Thanks a lot,
Best regards,
Maxim Levitsky
next prev parent reply other threads:[~2010-02-22 23:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1266091737.30330.16.camel@maxim-laptop>
2010-02-14 15:06 ` Legacy memstick support + FTL questions Alex Dubov
2010-02-14 19:03 ` Maxim Levitsky
2010-02-16 14:15 ` Alex Dubov
2010-02-16 23:49 ` Maxim Levitsky
2010-02-17 2:26 ` Alex Dubov
2010-02-17 23:39 ` Maxim Levitsky
2010-02-21 22:42 ` Maxim Levitsky
2010-02-22 14:04 ` Alex Dubov
2010-02-22 23:11 ` Maxim Levitsky [this message]
2010-02-23 9:01 ` Alex Dubov
2010-02-24 1:10 ` Maxim Levitsky
2010-02-24 2:20 ` Alex Dubov
2010-01-26 21:43 Maxim Levitsky
2010-01-27 2:16 ` Alex Dubov
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