From: Artem Bityutskiy <dedekind1@gmail.com>
To: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mtd@lists.infradead.org, dwmw2@infradead.org,
linux-kernel@vger.kernel.org, Reuben.Dowle@navico.com
Subject: Re: [PATCHv2 0/2] mtd: nand: Extend MLC support
Date: Wed, 05 May 2010 15:19:20 +0300 [thread overview]
Message-ID: <1273061960.3702.179.camel@localhost> (raw)
In-Reply-To: <17c88de31cd52bb3794569c28cd2ae51996e6260@localhost.localdomain>
On Tue, 2010-05-04 at 20:58 -0700, Kevin Cernekee wrote:
> Part 1/2 is an improved version of my previous submission. Additional
> checks were added to ensure that certain "5-byte" Micron and Samsung
> parts are not falsely detected as having 6-byte IDs. I also rolled in
> the 256B NAND_MAX_OOBSIZE change.
>
> Part 2/2 is a resubmission/rebase of Reuben Dowle's 2009/02/03 patch:
>
> http://lists.infradead.org/pipermail/linux-mtd/2009-February/024473.html
>
> I am trying to compile a table of NAND IDs to make sure the detection
> algorithm correctly handles all known cases. If you could send me the
> following information for any NAND chips you have access to (via
> private email), it would be appreciated:
>
> 1) Part number
>
> 2) ID code (please read 8 bytes so I can see where it wraps around)
>
> 3) Device size, block size, page size, OOB bytes per page, bus width,
> and bad block marker location
>
> 4) Datasheet, if available
Removed older patches and taken these ones to l2-mtd-2.6 / dunno.
--
Best Regards,
Artem Bityutskiy (Артём Битюцкий)
prev parent reply other threads:[~2010-05-05 12:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-05 3:58 [PATCHv2 0/2] mtd: nand: Extend MLC support Kevin Cernekee
2010-05-05 3:58 ` [PATCHv2 1/2] mtd: nand: Extend NAND flash detection to new MLC chips Kevin Cernekee
2010-05-05 7:34 ` Matthieu CASTET
2010-05-05 15:20 ` Kevin Cernekee
2010-05-05 3:58 ` [PATCHv2 2/2] mtd: nand: Support alternate BB marker locations on MLC Kevin Cernekee
2010-05-05 12:19 ` Artem Bityutskiy [this message]
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