From: Artem Bityutskiy <dedekind1@gmail.com>
To: akpm@linux-foundation.org
Cc: nsnehaprabha@ti.com, sudhakar.raj@ti.com, dwmw2@infradead.org,
linux-mtd@lists.infradead.org, cbouatmailru@gmail.com
Subject: Re: [patch 3/4] mtd-nand: davinci: correct 4-bit error correction
Date: Wed, 21 Jul 2010 13:36:51 +0300 [thread overview]
Message-ID: <1279708611.2306.8.camel@localhost> (raw)
In-Reply-To: <201007202224.o6KMO138021388@imap1.linux-foundation.org>
On Tue, 2010-07-20 at 15:24 -0700, akpm@linux-foundation.org wrote:
> From: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
>
> On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after setting the
> 4BITECC_ADD_CALC_START bit in the NAND Flash control register to 1 and
> before waiting for the NAND Flash status register to be equal to 1, 2 or
> 3, we have to wait till the ECC HW goes to correction state. Without this
> wait, ECC correction calculations will not be proper.
>
> This has been tested on DA830/OMAP-L137, DA850/OMAP-L138, DM355 and DM365
> EVMs.
>
> Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
> Acked-by: Sneha Narnakaje <nsnehaprabha@ti.com>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Anton Vorontsov <cbouatmailru@gmail.com>
> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Just pushed this to my l2-mtd-2.6 / master tree as well.
--
Best Regards,
Artem Bityutskiy (Артём Битюцкий)
prev parent reply other threads:[~2010-07-21 10:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-20 22:24 [patch 3/4] mtd-nand: davinci: correct 4-bit error correction akpm
2010-07-21 10:36 ` Artem Bityutskiy [this message]
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