From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ew0-f49.google.com ([209.85.215.49]) by canuck.infradead.org with esmtps (Exim 4.72 #1 (Red Hat Linux)) id 1PstH8-00027T-Ah for linux-mtd@lists.infradead.org; Fri, 25 Feb 2011 08:43:47 +0000 Received: by ewy23 with SMTP id 23so501256ewy.36 for ; Fri, 25 Feb 2011 00:43:44 -0800 (PST) Subject: Re: CONFIG_MTD_NAND_VERIFY_WRITE with Software ECC From: Artem Bityutskiy To: Ricard Wanderlof In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Date: Fri, 25 Feb 2011 10:42:22 +0200 Message-ID: <1298623342.2798.9.camel@localhost> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Cc: David Peverley , "linux-mtd@lists.infradead.org" Reply-To: dedekind1@gmail.com List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Thu, 2011-02-17 at 11:04 +0100, Ricard Wanderlof wrote: > Which all goes to say that as Cooke notes in his document above, it is > necessary for the software to keep track of the number of erase cycles, > and not just rely in the erase/write status that the chip itself reports. Yeah, in UBI we do keep have erase counters, but we do not actually use them to make decisions about whether to mark a block as good or bad. Probably we should. -- Best Regards, Artem Bityutskiy (Артём Битюцкий)