[RESEND PATCH v2 1/7] mtd: nand-gpio: Convert driver to using resource-managed functions

[RESEND PATCH v2 1/7] mtd: nand-gpio: Convert driver to using resource-managed functions

[Alexander Shiyan]

Patch converts driver to using resource-managed functions.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 drivers/mtd/nand/gpio.c | 130 ++++++++++++++----------------------------------
 1 file changed, 38 insertions(+), 92 deletions(-)

diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index 89065dd..c35f46e 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -17,6 +17,7 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/err.h>
 #include <linux/init.h>
 #include <linux/slab.h>
 #include <linux/module.h>
@@ -233,119 +234,81 @@ gpio_nand_get_io_sync(struct platform_device *pdev)
 static int gpio_nand_remove(struct platform_device *dev)
 {
 	struct gpiomtd *gpiomtd = platform_get_drvdata(dev);
-	struct resource *res;
 
 	nand_release(&gpiomtd->mtd_info);
 
-	res = gpio_nand_get_io_sync(dev);
-	iounmap(gpiomtd->io_sync);
-	if (res)
-		release_mem_region(res->start, resource_size(res));
-
-	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
-	iounmap(gpiomtd->nand_chip.IO_ADDR_R);
-	release_mem_region(res->start, resource_size(res));
-
 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
 		gpio_set_value(gpiomtd->plat.gpio_nwp, 0);
 	gpio_set_value(gpiomtd->plat.gpio_nce, 1);
 
-	gpio_free(gpiomtd->plat.gpio_cle);
-	gpio_free(gpiomtd->plat.gpio_ale);
-	gpio_free(gpiomtd->plat.gpio_nce);
-	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
-		gpio_free(gpiomtd->plat.gpio_nwp);
-	if (gpio_is_valid(gpiomtd->plat.gpio_rdy))
-		gpio_free(gpiomtd->plat.gpio_rdy);
-
 	return 0;
 }
 
-static void __iomem *request_and_remap(struct resource *res, size_t size,
-					const char *name, int *err)
-{
-	void __iomem *ptr;
-
-	if (!request_mem_region(res->start, resource_size(res), name)) {
-		*err = -EBUSY;
-		return NULL;
-	}
-
-	ptr = ioremap(res->start, size);
-	if (!ptr) {
-		release_mem_region(res->start, resource_size(res));
-		*err = -ENOMEM;
-	}
-	return ptr;
-}
-
 static int gpio_nand_probe(struct platform_device *dev)
 {
 	struct gpiomtd *gpiomtd;
 	struct nand_chip *this;
-	struct resource *res0, *res1;
+	struct resource *res;
 	struct mtd_part_parser_data ppdata = {};
 	int ret = 0;
 
 	if (!dev->dev.of_node && !dev->dev.platform_data)
 		return -EINVAL;
 
-	res0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
-	if (!res0)
-		return -EINVAL;
-
 	gpiomtd = devm_kzalloc(&dev->dev, sizeof(*gpiomtd), GFP_KERNEL);
-	if (gpiomtd == NULL) {
+	if (!gpiomtd) {
 		dev_err(&dev->dev, "failed to create NAND MTD\n");
 		return -ENOMEM;
 	}
 
 	this = &gpiomtd->nand_chip;
-	this->IO_ADDR_R = request_and_remap(res0, 2, "NAND", &ret);
-	if (!this->IO_ADDR_R) {
-		dev_err(&dev->dev, "unable to map NAND\n");
-		goto err_map;
-	}
 
-	res1 = gpio_nand_get_io_sync(dev);
-	if (res1) {
-		gpiomtd->io_sync = request_and_remap(res1, 4, "NAND sync", &ret);
-		if (!gpiomtd->io_sync) {
-			dev_err(&dev->dev, "unable to map sync NAND\n");
-			goto err_sync;
-		}
+	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+	this->IO_ADDR_R = devm_ioremap_resource(&dev->dev, res);
+	if (IS_ERR(this->IO_ADDR_R))
+		return PTR_ERR(this->IO_ADDR_R);
+
+	res = gpio_nand_get_io_sync(dev);
+	if (res) {
+		gpiomtd->io_sync = devm_ioremap_resource(&dev->dev, res);
+		if (IS_ERR(gpiomtd->io_sync))
+			return PTR_ERR(gpiomtd->io_sync);
 	}
 
 	ret = gpio_nand_get_config(&dev->dev, &gpiomtd->plat);
 	if (ret)
-		goto err_nce;
+		return ret;
 
-	ret = gpio_request(gpiomtd->plat.gpio_nce, "NAND NCE");
+	ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nce, "NAND NCE");
 	if (ret)
-		goto err_nce;
+		return ret;
 	gpio_direction_output(gpiomtd->plat.gpio_nce, 1);
+
 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) {
-		ret = gpio_request(gpiomtd->plat.gpio_nwp, "NAND NWP");
+		ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nwp,
+					"NAND NWP");
 		if (ret)
-			goto err_nwp;
-		gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);
+			return ret;
 	}
-	ret = gpio_request(gpiomtd->plat.gpio_ale, "NAND ALE");
+
+	ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_ale, "NAND ALE");
 	if (ret)
-		goto err_ale;
+		return ret;
 	gpio_direction_output(gpiomtd->plat.gpio_ale, 0);
-	ret = gpio_request(gpiomtd->plat.gpio_cle, "NAND CLE");
+
+	ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_cle, "NAND CLE");
 	if (ret)
-		goto err_cle;
+		return ret;
 	gpio_direction_output(gpiomtd->plat.gpio_cle, 0);
+
 	if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) {
-		ret = gpio_request(gpiomtd->plat.gpio_rdy, "NAND RDY");
+		ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_rdy,
+					"NAND RDY");
 		if (ret)
-			goto err_rdy;
+			return ret;
 		gpio_direction_input(gpiomtd->plat.gpio_rdy);
 	}
 
-
 	this->IO_ADDR_W  = this->IO_ADDR_R;
 	this->ecc.mode   = NAND_ECC_SOFT;
 	this->options    = gpiomtd->plat.options;
@@ -367,8 +330,12 @@ static int gpio_nand_probe(struct platform_device *dev)
 	gpiomtd->mtd_info.priv = this;
 	gpiomtd->mtd_info.owner = THIS_MODULE;
 
+	platform_set_drvdata(dev, gpiomtd);
+
+	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
+		gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);
+
 	if (nand_scan(&gpiomtd->mtd_info, 1)) {
-		dev_err(&dev->dev, "no nand chips found?\n");
 		ret = -ENXIO;
 		goto err_wp;
 	}
@@ -381,34 +348,13 @@ static int gpio_nand_probe(struct platform_device *dev)
 	ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata,
 					gpiomtd->plat.parts,
 					gpiomtd->plat.num_parts);
-	if (ret)
-		goto err_wp;
-	platform_set_drvdata(dev, gpiomtd);
-
-	return 0;
+	if (!ret)
+		return 0;
 
 err_wp:
 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
 		gpio_set_value(gpiomtd->plat.gpio_nwp, 0);
-	if (gpio_is_valid(gpiomtd->plat.gpio_rdy))
-		gpio_free(gpiomtd->plat.gpio_rdy);
-err_rdy:
-	gpio_free(gpiomtd->plat.gpio_cle);
-err_cle:
-	gpio_free(gpiomtd->plat.gpio_ale);
-err_ale:
-	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
-		gpio_free(gpiomtd->plat.gpio_nwp);
-err_nwp:
-	gpio_free(gpiomtd->plat.gpio_nce);
-err_nce:
-	iounmap(gpiomtd->io_sync);
-	if (res1)
-		release_mem_region(res1->start, resource_size(res1));
-err_sync:
-	iounmap(gpiomtd->nand_chip.IO_ADDR_R);
-	release_mem_region(res0->start, resource_size(res0));
-err_map:
+
 	return ret;
 }
 
-- 
1.8.1.5

[RESEND PATCH v2 2/7] mtd: nand-gpio: Use default dev_ready function if RDY is missing in configuration

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 drivers/mtd/nand/gpio.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index c35f46e..8f102d1 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -136,10 +136,7 @@ static int gpio_nand_devready(struct mtd_info *mtd)
 {
 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(mtd);
 
-	if (gpio_is_valid(gpiomtd->plat.gpio_rdy))
-		return gpio_get_value(gpiomtd->plat.gpio_rdy);
-
-	return 1;
+	return gpio_get_value(gpiomtd->plat.gpio_rdy);
 }
 
 #ifdef CONFIG_OF
@@ -307,6 +304,7 @@ static int gpio_nand_probe(struct platform_device *dev)
 		if (ret)
 			return ret;
 		gpio_direction_input(gpiomtd->plat.gpio_rdy);
+		this->dev_ready = gpio_nand_devready;
 	}
 
 	this->IO_ADDR_W  = this->IO_ADDR_R;
@@ -316,7 +314,6 @@ static int gpio_nand_probe(struct platform_device *dev)
 
 	/* install our routines */
 	this->cmd_ctrl   = gpio_nand_cmd_ctrl;
-	this->dev_ready  = gpio_nand_devready;
 
 	if (this->options & NAND_BUSWIDTH_16) {
 		this->read_buf   = gpio_nand_readbuf16;
-- 
1.8.1.5

[RESEND PATCH v2 3/7] mtd: nand-gpio: Do not override GPIOs if driver uses platform_data but OF is enabled in kernel config

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 drivers/mtd/nand/gpio.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index 8f102d1..0d26f8b 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -151,6 +151,9 @@ static int gpio_nand_get_config_of(const struct device *dev,
 {
 	u32 val;
 
+	if (!dev->of_node)
+		return -ENODEV;
+
 	if (!of_property_read_u32(dev->of_node, "bank-width", &val)) {
 		if (val == 2) {
 			plat->options |= NAND_BUSWIDTH_16;
-- 
1.8.1.5

[RESEND PATCH v2 4/7] mtd: nand-gpio: Use default nand_base {read/write}_buf functions

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 drivers/mtd/nand/gpio.c | 56 -------------------------------------------------
 1 file changed, 56 deletions(-)

diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index 0d26f8b..312c285 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -87,51 +87,6 @@ static void gpio_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 	gpio_nand_dosync(gpiomtd);
 }
 
-static void gpio_nand_writebuf(struct mtd_info *mtd, const u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-
-	iowrite8_rep(this->IO_ADDR_W, buf, len);
-}
-
-static void gpio_nand_readbuf(struct mtd_info *mtd, u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-
-	ioread8_rep(this->IO_ADDR_R, buf, len);
-}
-
-static void gpio_nand_writebuf16(struct mtd_info *mtd, const u_char *buf,
-				 int len)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (IS_ALIGNED((unsigned long)buf, 2)) {
-		iowrite16_rep(this->IO_ADDR_W, buf, len>>1);
-	} else {
-		int i;
-		unsigned short *ptr = (unsigned short *)buf;
-
-		for (i = 0; i < len; i += 2, ptr++)
-			writew(*ptr, this->IO_ADDR_W);
-	}
-}
-
-static void gpio_nand_readbuf16(struct mtd_info *mtd, u_char *buf, int len)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (IS_ALIGNED((unsigned long)buf, 2)) {
-		ioread16_rep(this->IO_ADDR_R, buf, len>>1);
-	} else {
-		int i;
-		unsigned short *ptr = (unsigned short *)buf;
-
-		for (i = 0; i < len; i += 2, ptr++)
-			*ptr = readw(this->IO_ADDR_R);
-	}
-}
-
 static int gpio_nand_devready(struct mtd_info *mtd)
 {
 	struct gpiomtd *gpiomtd = gpio_nand_getpriv(mtd);
@@ -314,19 +269,8 @@ static int gpio_nand_probe(struct platform_device *dev)
 	this->ecc.mode   = NAND_ECC_SOFT;
 	this->options    = gpiomtd->plat.options;
 	this->chip_delay = gpiomtd->plat.chip_delay;
-
-	/* install our routines */
 	this->cmd_ctrl   = gpio_nand_cmd_ctrl;
 
-	if (this->options & NAND_BUSWIDTH_16) {
-		this->read_buf   = gpio_nand_readbuf16;
-		this->write_buf  = gpio_nand_writebuf16;
-	} else {
-		this->read_buf   = gpio_nand_readbuf;
-		this->write_buf  = gpio_nand_writebuf;
-	}
-
-	/* set the mtd private data for the nand driver */
 	gpiomtd->mtd_info.priv = this;
 	gpiomtd->mtd_info.owner = THIS_MODULE;
 
-- 
1.8.1.5

[RESEND PATCH v2 5/7] mtd: nand-gpio: Unneeded dependency on ARM removed

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 drivers/mtd/nand/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index a60f6c1..3ae9105 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -75,7 +75,7 @@ config MTD_NAND_DENALI_SCRATCH_REG_ADDR
 
 config MTD_NAND_GPIO
 	tristate "GPIO NAND Flash driver"
-	depends on GPIOLIB && ARM
+	depends on GPIOLIB
 	help
 	  This enables a GPIO based NAND flash driver.
 
-- 
1.8.1.5

[RESEND PATCH v2 6/7] mtd: nand-gpio: Rename internal variables to match functionality

[Alexander Shiyan]

struct platform_device *dev => pdev
struct nand_chip *this => chip

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 drivers/mtd/nand/gpio.c | 60 ++++++++++++++++++++++++-------------------------
 1 file changed, 30 insertions(+), 30 deletions(-)

diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index 312c285..6bf8f2e 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -186,9 +186,9 @@ gpio_nand_get_io_sync(struct platform_device *pdev)
 	return platform_get_resource(pdev, IORESOURCE_MEM, 1);
 }
 
-static int gpio_nand_remove(struct platform_device *dev)
+static int gpio_nand_remove(struct platform_device *pdev)
 {
-	struct gpiomtd *gpiomtd = platform_get_drvdata(dev);
+	struct gpiomtd *gpiomtd = platform_get_drvdata(pdev);
 
 	nand_release(&gpiomtd->mtd_info);
 
@@ -199,82 +199,82 @@ static int gpio_nand_remove(struct platform_device *dev)
 	return 0;
 }
 
-static int gpio_nand_probe(struct platform_device *dev)
+static int gpio_nand_probe(struct platform_device *pdev)
 {
 	struct gpiomtd *gpiomtd;
-	struct nand_chip *this;
+	struct nand_chip *chip;
 	struct resource *res;
 	struct mtd_part_parser_data ppdata = {};
 	int ret = 0;
 
-	if (!dev->dev.of_node && !dev->dev.platform_data)
+	if (!pdev->dev.of_node && !pdev->dev.platform_data)
 		return -EINVAL;
 
-	gpiomtd = devm_kzalloc(&dev->dev, sizeof(*gpiomtd), GFP_KERNEL);
+	gpiomtd = devm_kzalloc(&pdev->dev, sizeof(*gpiomtd), GFP_KERNEL);
 	if (!gpiomtd) {
-		dev_err(&dev->dev, "failed to create NAND MTD\n");
+		dev_err(&pdev->dev, "failed to create NAND MTD\n");
 		return -ENOMEM;
 	}
 
-	this = &gpiomtd->nand_chip;
+	chip = &gpiomtd->nand_chip;
 
-	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
-	this->IO_ADDR_R = devm_ioremap_resource(&dev->dev, res);
-	if (IS_ERR(this->IO_ADDR_R))
-		return PTR_ERR(this->IO_ADDR_R);
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(chip->IO_ADDR_R))
+		return PTR_ERR(chip->IO_ADDR_R);
 
-	res = gpio_nand_get_io_sync(dev);
+	res = gpio_nand_get_io_sync(pdev);
 	if (res) {
-		gpiomtd->io_sync = devm_ioremap_resource(&dev->dev, res);
+		gpiomtd->io_sync = devm_ioremap_resource(&pdev->dev, res);
 		if (IS_ERR(gpiomtd->io_sync))
 			return PTR_ERR(gpiomtd->io_sync);
 	}
 
-	ret = gpio_nand_get_config(&dev->dev, &gpiomtd->plat);
+	ret = gpio_nand_get_config(&pdev->dev, &gpiomtd->plat);
 	if (ret)
 		return ret;
 
-	ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nce, "NAND NCE");
+	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nce, "NAND NCE");
 	if (ret)
 		return ret;
 	gpio_direction_output(gpiomtd->plat.gpio_nce, 1);
 
 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) {
-		ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nwp,
+		ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nwp,
 					"NAND NWP");
 		if (ret)
 			return ret;
 	}
 
-	ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_ale, "NAND ALE");
+	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_ale, "NAND ALE");
 	if (ret)
 		return ret;
 	gpio_direction_output(gpiomtd->plat.gpio_ale, 0);
 
-	ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_cle, "NAND CLE");
+	ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_cle, "NAND CLE");
 	if (ret)
 		return ret;
 	gpio_direction_output(gpiomtd->plat.gpio_cle, 0);
 
 	if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) {
-		ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_rdy,
+		ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_rdy,
 					"NAND RDY");
 		if (ret)
 			return ret;
 		gpio_direction_input(gpiomtd->plat.gpio_rdy);
-		this->dev_ready = gpio_nand_devready;
+		chip->dev_ready = gpio_nand_devready;
 	}
 
-	this->IO_ADDR_W  = this->IO_ADDR_R;
-	this->ecc.mode   = NAND_ECC_SOFT;
-	this->options    = gpiomtd->plat.options;
-	this->chip_delay = gpiomtd->plat.chip_delay;
-	this->cmd_ctrl   = gpio_nand_cmd_ctrl;
+	chip->IO_ADDR_W		= chip->IO_ADDR_R;
+	chip->ecc.mode		= NAND_ECC_SOFT;
+	chip->options		= gpiomtd->plat.options;
+	chip->chip_delay	= gpiomtd->plat.chip_delay;
+	chip->cmd_ctrl		= gpio_nand_cmd_ctrl;
 
-	gpiomtd->mtd_info.priv = this;
-	gpiomtd->mtd_info.owner = THIS_MODULE;
+	gpiomtd->mtd_info.priv	= chip;
+	gpiomtd->mtd_info.owner	= THIS_MODULE;
 
-	platform_set_drvdata(dev, gpiomtd);
+	platform_set_drvdata(pdev, gpiomtd);
 
 	if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
 		gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);
@@ -288,7 +288,7 @@ static int gpio_nand_probe(struct platform_device *dev)
 		gpiomtd->plat.adjust_parts(&gpiomtd->plat,
 					   gpiomtd->mtd_info.size);
 
-	ppdata.of_node = dev->dev.of_node;
+	ppdata.of_node = pdev->dev.of_node;
 	ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata,
 					gpiomtd->plat.parts,
 					gpiomtd->plat.num_parts);
-- 
1.8.1.5

[RESEND PATCH v2 7/7] mtd: nand-gpio: Add missing "owner" field in platform_driver struct

[Alexander Shiyan]

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 drivers/mtd/nand/gpio.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index 6bf8f2e..ba62899 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -307,6 +307,7 @@ static struct platform_driver gpio_nand_driver = {
 	.remove		= gpio_nand_remove,
 	.driver		= {
 		.name	= "gpio-nand",
+		.owner	= THIS_MODULE,
 		.of_match_table = of_match_ptr(gpio_nand_id_table),
 	},
 };
-- 
1.8.1.5

Re: [RESEND PATCH v2 1/7] mtd: nand-gpio: Convert driver to using resource-managed functions

[Artem Bityutskiy]

On Mon, 2013-05-06 at 17:53 +0400, Alexander Shiyan wrote:
> Patch converts driver to using resource-managed functions.
> 
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>

Pushed the series to l2-mtd.git, thanks!

-- 
Best Regards,
Artem Bityutskiy

Re[2]: [RESEND PATCH v2 1/7] mtd: nand-gpio: Convert driver to using resource-managed functions

[Alexander Shiyan]

> On Mon, 2013-05-06 at 17:53 +0400, Alexander Shiyan wrote:
> > Patch converts driver to using resource-managed functions.
> > 
> > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> 
> Pushed the series to l2-mtd.git, thanks!

This series should be applied with one more patch for nand_base:
http://comments.gmane.org/gmane.linux.drivers.mtd/46206 
So, please, apply this one if it possible.
Thanks.

---

Re: Re[2]: [RESEND PATCH v2 1/7] mtd: nand-gpio: Convert driver to using resource-managed functions

[Artem Bityutskiy]

On Mon, 2013-05-13 at 11:07 +0400, Alexander Shiyan wrote:
> > On Mon, 2013-05-06 at 17:53 +0400, Alexander Shiyan wrote:
> > > Patch converts driver to using resource-managed functions.
> > > 
> > > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> > 
> > Pushed the series to l2-mtd.git, thanks!
> 
> This series should be applied with one more patch for nand_base:
> http://comments.gmane.org/gmane.linux.drivers.mtd/46206 

Why is this one dependent on the series? To me it looked completely
independent.

> So, please, apply this one if it possible.

In case of a dependency, why it was not a part of the series?

-- 
Best Regards,
Artem Bityutskiy

Re: [RESEND PATCH v2 1/7] mtd: nand-gpio: Convert driver to using resource-managed functions

[Alexander Shiyan]

> > > On Mon, 2013-05-06 at 17:53 +0400, Alexander Shiyan wrote:
> > > > Patch converts driver to using resource-managed functions.
> > > > 
> > > > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> > > 
> > > Pushed the series to l2-mtd.git, thanks!
> > 
> > This series should be applied with one more patch for nand_base:
> > http://comments.gmane.org/gmane.linux.drivers.mtd/46206 
> 
> Why is this one dependent on the series? To me it looked completely
> independent.
> 
> > So, please, apply this one if it possible.
> 
> In case of a dependency, why it was not a part of the series?

This is not direct dependency. Single patch for nand_base now
uses io_xx_rep, nand-gpio series removes this macro and uses
nand_base implementation. This should not be a problem as nand_base
have default functions for read/write, so it just improvement.

---

Re: [RESEND PATCH v2 1/7] mtd: nand-gpio: Convert driver to using resource-managed functions

[Artem Bityutskiy]

On Mon, 2013-05-13 at 11:30 +0400, Alexander Shiyan wrote:
> > > > On Mon, 2013-05-06 at 17:53 +0400, Alexander Shiyan wrote:
> > > > > Patch converts driver to using resource-managed functions.
> > > > > 
> > > > > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> > > > 
> > > > Pushed the series to l2-mtd.git, thanks!
> > > 
> > > This series should be applied with one more patch for nand_base:
> > > http://comments.gmane.org/gmane.linux.drivers.mtd/46206 
> > 
> > Why is this one dependent on the series? To me it looked completely
> > independent.
> > 
> > > So, please, apply this one if it possible.
> > 
> > In case of a dependency, why it was not a part of the series?
> 
> This is not direct dependency. Single patch for nand_base now
> uses io_xx_rep, nand-gpio series removes this macro and uses
> nand_base implementation. This should not be a problem as nand_base
> have default functions for read/write, so it just improvement.

Ok, that's what I also thought. You wrote in your e-mail that "this
series should be applied with this patch", which sounded like there is a
dependency.

Anyway, all of them are in my tree now, thanks!

-- 
Best Regards,
Artem Bityutskiy