From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pb0-x234.google.com ([2607:f8b0:400e:c01::234]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VE7VX-0005G0-BL for linux-mtd@lists.infradead.org; Tue, 27 Aug 2013 00:51:43 +0000 Received: by mail-pb0-f52.google.com with SMTP id wz12so4083642pbc.39 for ; Mon, 26 Aug 2013 17:51:21 -0700 (PDT) From: wangyuhang To: broonie@kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-mtd@lists.infradead.org Subject: [PATCH V2 2/2] spi: dual and quad support(device tree) Date: Tue, 27 Aug 2013 08:50:03 +0800 Message-Id: <1377564603-4030-2-git-send-email-wangyuhang2014@gmail.com> In-Reply-To: <1377564603-4030-1-git-send-email-wangyuhang2014@gmail.com> References: <1377564603-4030-1-git-send-email-wangyuhang2014@gmail.com> Cc: sourav.poddar@ti.com, pekon@ti.com, wangyuhang List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Add spi-tmax-nbits and spi-rmax-nbits for spi slave node. Modify the related dt document(spi-bus.txt) spi-tmax-nbits:Max number of bits slave will use for MOSI(writting) spi-rmax-nbits:Max number of bits slave will use for MISO(reading) Support for spi-tx/rmax-nbits in SPI framework has been picked[1]. [1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14420 Commit Id:f477b7fb13df2b843997559ff34e87d054ba6538 Signed-off-by: wangyuhang --- Documentation/devicetree/bindings/spi/spi-bus.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt index 296015e..211336c 100644 --- a/Documentation/devicetree/bindings/spi/spi-bus.txt +++ b/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -55,6 +55,22 @@ contain the following properties. chip select active high - spi-3wire - (optional) Empty property indicating device requires 3-wire mode. +- spi-tmax-nbits - (optional) Max number of bits slave will use for + MOSI(writting) +- spi-rmax-nbits - (optional) Max number of bits slave will use for + MISO(reading) + +So if for example the slave has 4 wires for writting and 2 wires for reading, +and the spi-tx/rx-nbits property should be set as follows: + +spi-tmax-nbits = <4>; +spi-rmax-nbits = <2>; + +Now the value that spi-tmax-nbits and spi-rmax-nbits can receive is only +1(single), 2(dual) and 4(quad). If you don't set spi-tmax-nbits or spi-rmax-nbits, +spi_device mode will be set in single(1 wire) as default. Another point, if +property:spi-3wire is set, spi-t/rmax-nbits is forbidden to set to <2 or 4>, +otherwise, an errro will return. If a gpio chipselect is used for the SPI slave the gpio number will be passed via the cs_gpio -- 1.7.9.5