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Subject: Re: [PATCH v3] fsl_ifc: Support all 8 IFC chip selects
From: Scott Wood <scottwood@freescale.com>
To: Aaron Sierra <asierra@xes-inc.com>
Date: Tue, 26 Aug 2014 18:21:02 -0500
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Cc: Arnd Bergmann <arnd@arndb.de>,
 Greg Kroah-Hartman <gregkh@linuxfoundation.org>, linux-mtd@lists.infradead.org,
 Brian Norris <computersforpeace@gmail.com>,
 David Woodhouse <dwmw2@infradead.org>,
 Prabhakar Kushwaha <prabhakar@freescale.com>
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On Tue, 2014-08-26 at 18:18 -0500, Aaron Sierra wrote:
> Freescale's QorIQ T Series processors support 8 IFC chip selects
> within a memory map backward compatible with previous P Series
> processors which supported only 4 chip selects.
> 
> Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
> ---
>  Note: v1 and v2 patches were submitted to Linux PPC mailing list
> 
>  v3: * IFC version register read only once
>      * fsl_ifc_version and fsl_ifc_bank_count inline functions replaced
>        by version and banks members of struct fsl_ifc_ctrl
>      * IFC version print moved from fsl_ifc_nand.c to fsl_ifc.c
> 
>  drivers/memory/fsl_ifc.c        | 13 +++++++++++--
>  drivers/mtd/nand/fsl_ifc_nand.c | 10 ++++------
>  include/linux/fsl_ifc.h         | 21 ++++++++++++++++-----
>  3 files changed, 31 insertions(+), 13 deletions(-)

Acked-by: Scott Wood <scottwood@freescale.com>

-Scott