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Message-ID: <1460751818.19090.43.camel@perches.com>
Subject: Re: [PATCH 09/12] mtd: nand: fsmc: validate ECC setup by checking
 algorithm directly
From: Joe Perches <joe@perches.com>
To: =?UTF-8?Q?Rafa=C5=82_Mi=C5=82ecki?= <zajec5@gmail.com>, Boris Brezillon
 <boris.brezillon@free-electrons.com>
Cc: linux-mtd@lists.infradead.org, Richard Weinberger <richard@nod.at>,
 David Woodhouse <dwmw2@infradead.org>, Brian Norris
 <computersforpeace@gmail.com>, open list <linux-kernel@vger.kernel.org>
Date: Fri, 15 Apr 2016 13:23:38 -0700
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On Fri, 2016-04-15 at 21:54 +0200, Rafał Miłecki wrote:
> NAND core sets ECC algorithm in algo field now and it should be
> preferred over the mode field. This also prepares driver for dropping
> NAND_ECC_SOFT_BCH.
> 
> Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
> ---
>  drivers/mtd/nand/fsmc_nand.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
> index 1372040..0f8c63f 100644
> --- a/drivers/mtd/nand/fsmc_nand.c
> +++ b/drivers/mtd/nand/fsmc_nand.c
> @@ -958,9 +958,12 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
>  			nand->ecc.strength = 1;
>  			break;
>  
> +		case NAND_ECC_SOFT:
>  		case NAND_ECC_SOFT_BCH:
> -			dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n");
> -			break;
> +			if (nand->ecc.algo == NAND_ECC_BCH) {
> +				dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n");
> +				break;
> +			}
>  
>  		default:
>  			dev_err(&pdev->dev, "Unsupported ECC mode!\n");

Why not just add NAND_ECC_SOFT above the default case?