From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-lf0-x22d.google.com ([2a00:1450:4010:c07::22d]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1arqFN-0002Sc-T2 for linux-mtd@lists.infradead.org; Sun, 17 Apr 2016 17:12:34 +0000 Received: by mail-lf0-x22d.google.com with SMTP id g184so193601954lfb.3 for ; Sun, 17 Apr 2016 10:12:13 -0700 (PDT) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: Boris Brezillon Cc: linux-mtd@lists.infradead.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Mikael Starvik , Jesper Nilsson , Brian Norris , linux-cris-kernel@axis.com (open list:CRIS PORT), linux-kernel@vger.kernel.org (open list) Subject: [PATCH V2 04/11] CRIS v32: nand: set ECC algorithm explicitly Date: Sun, 17 Apr 2016 19:11:37 +0200 Message-Id: <1460913104-27388-5-git-send-email-zajec5@gmail.com> In-Reply-To: <1460913104-27388-1-git-send-email-zajec5@gmail.com> References: <1460750052-16285-1-git-send-email-zajec5@gmail.com> <1460913104-27388-1-git-send-email-zajec5@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki --- arch/cris/arch-v32/drivers/mach-a3/nandflash.c | 1 + arch/cris/arch-v32/drivers/mach-fs/nandflash.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c index 5aa3f51..3f646c7 100644 --- a/arch/cris/arch-v32/drivers/mach-a3/nandflash.c +++ b/arch/cris/arch-v32/drivers/mach-a3/nandflash.c @@ -157,6 +157,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) /* 20 us command delay time */ this->chip_delay = 20; this->ecc.mode = NAND_ECC_SOFT; + this->ecc.algo = NAND_ECC_HAMMING; /* Enable the following for a flash based bad block table */ /* this->bbt_options = NAND_BBT_USE_FLASH; */ diff --git a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c index a7c17b0..a745405 100644 --- a/arch/cris/arch-v32/drivers/mach-fs/nandflash.c +++ b/arch/cris/arch-v32/drivers/mach-fs/nandflash.c @@ -148,6 +148,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void) /* 20 us command delay time */ this->chip_delay = 20; this->ecc.mode = NAND_ECC_SOFT; + this->ecc.algo = NAND_ECC_HAMMING; /* Enable the following for a flash based bad block table */ /* this->bbt_options = NAND_BBT_USE_FLASH; */ -- 1.8.4.5