From: Xiaolei Li <xiaolei.li@mediatek.com>
To: <boris.brezillon@bootlin.com>
Cc: <linux-mtd@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <xiaolei.li@mediatek.com>
Subject: [PATCH v3] dt-bindings: mtd: mtk-nand: Update properties description
Date: Tue, 24 Apr 2018 10:11:07 +0800 [thread overview]
Message-ID: <1524535867-32413-2-git-send-email-xiaolei.li@mediatek.com> (raw)
In-Reply-To: <1524535867-32413-1-git-send-email-xiaolei.li@mediatek.com>
Update ecc step size, ecc strength, and parity bits supported on
each MTK NAND controller.
Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com>
---
Documentation/devicetree/bindings/mtd/mtk-nand.txt | 24 +++++++++++++++++-----
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/mtk-nand.txt b/Documentation/devicetree/bindings/mtd/mtk-nand.txt
index 1c88526..f20ab4a 100644
--- a/Documentation/devicetree/bindings/mtd/mtk-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/mtk-nand.txt
@@ -50,14 +50,19 @@ Optional:
- nand-on-flash-bbt: Store BBT on NAND Flash.
- nand-ecc-mode: the NAND ecc mode (check driver for supported modes)
- nand-ecc-step-size: Number of data bytes covered by a single ECC step.
- valid values: 512 and 1024.
+ valid values:
+ 512 and 1024 on mt2701 and mt2712.
+ 512 only on mt7622.
1024 is recommended for large page NANDs.
- nand-ecc-strength: Number of bits to correct per ECC step.
- The valid values that the controller supports are: 4, 6,
- 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36, 40, 44,
- 48, 52, 56, 60.
+ The valid values that each controller supports:
+ mt2701: 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28,
+ 32, 36, 40, 44, 48, 52, 56, 60.
+ mt2712: 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28,
+ 32, 36, 40, 44, 48, 52, 56, 60, 68, 72, 80.
+ mt7622: 4, 6, 8, 10, 12, 14, 16.
The strength should be calculated as follows:
- E = (S - F) * 8 / 14
+ E = (S - F) * 8 / B
S = O / (P / Q)
E : nand-ecc-strength.
S : spare size per sector.
@@ -66,6 +71,15 @@ Optional:
O : oob size.
P : page size.
Q : nand-ecc-step-size.
+ B : number of parity bits needed to correct
+ 1 bitflip.
+ According to MTK NAND controller design,
+ this number depends on max ecc step size
+ that MTK NAND controller supports.
+ If max ecc step size supported is 1024,
+ then it should be always 14. And if max
+ ecc step size is 512, then it should be
+ always 13.
If the result does not match any one of the listed
choices above, please select the smaller valid value from
the list.
--
1.9.1
next prev parent reply other threads:[~2018-04-24 2:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-24 2:11 [PATCH v3] Improve MTK NAND driver Xiaolei Li
2018-04-24 2:11 ` Xiaolei Li [this message]
2018-04-26 20:09 ` [PATCH v3] dt-bindings: mtd: mtk-nand: Update properties description Boris Brezillon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1524535867-32413-2-git-send-email-xiaolei.li@mediatek.com \
--to=xiaolei.li@mediatek.com \
--cc=boris.brezillon@bootlin.com \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-mtd@lists.infradead.org \
--cc=srv_heupstream@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox