* Problems with AMD CFI chips
@ 2000-10-31 17:47 mark.langsdorf
2000-10-31 17:55 ` David Woodhouse
0 siblings, 1 reply; 7+ messages in thread
From: mark.langsdorf @ 2000-10-31 17:47 UTC (permalink / raw)
To: mtd
I'm testing the MTD/JFFS combo using Kernel 2.2.16 and
the October 30, 2000 version of MTD on AMD CFI compliant
chips.
The Flash bank is found correctly, and loads, and I can
write to it. However, when I boot from it, I can't seem
to get it to commit writes - either creating new files
or altering old ones. Once I reboot the device, my
changes are gone.
mtab shows the root device as being mounted read/write.
When I write a file, the debug info seems to indicate
that the version numbers are being updated properly.
What other information should I provide to help debug
this problem?
Mark Langsdorf
Advanced Micro Devices, Inc Tel: 512.602.3756
5204 E. Ben White Blvd. M/S 590 Fax: 512.602.5051
Austin, TX 78741 mark.langsdorf@amd.com
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* Re: Problems with AMD CFI chips
2000-10-31 17:47 Problems with AMD CFI chips mark.langsdorf
@ 2000-10-31 17:55 ` David Woodhouse
2000-11-08 16:49 ` cfi_cmdset_0001 Nicolas Pitre
0 siblings, 1 reply; 7+ messages in thread
From: David Woodhouse @ 2000-10-31 17:55 UTC (permalink / raw)
To: mark.langsdorf; +Cc: mtd
mark.langsdorf@amd.com said:
> The Flash bank is found correctly, and loads, and I can write to it.
> However, when I boot from it, I can't seem to get it to commit writes
> - either creating new files or altering old ones. Once I reboot the
> device, my changes are gone.
Please check using the /dev/mtd0 device directly to see whether your writes
are 'taking'.
What 'map' driver are you using? I found that it didn't work for me on the
iPAQ because I wasn't enabling the Vpp voltage during write cycles. Is this
necessary on your targer?
Other than that, poke the author and/or look at the code yourself to see
what's happening. What interleave/buswidth are you using?
Note to self: Must produce a proper bug report for Nico for the current
cfi_cmdset_0001 code, does doesn't work for me on 1x16 devices.
--
dwmw2
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* RE: Problems with AMD CFI chips
@ 2000-11-02 17:19 mark.langsdorf
2000-11-02 19:16 ` Gregory Schallert
2000-11-02 22:31 ` David Woodhouse
0 siblings, 2 replies; 7+ messages in thread
From: mark.langsdorf @ 2000-11-02 17:19 UTC (permalink / raw)
To: mtd
> mark.langsdorf@amd.com said:
> > The Flash bank is found correctly, and loads, and I can
> > write to it.
> > However, when I boot from it, I can't seem to get it to
> > commit writes- either creating new files or altering old
> > ones. Once I reboot the device, my changes are gone.
>
> Please check using the /dev/mtd0 device directly to see
> whether your writes are 'taking'.
I can write to /dev/mtd0, the writes through the char
interface are definitely consistent over power-outs. It's
only when I use jffs on /dev/mtdblock0 that I run into problems.
> What 'map' driver are you using?
Modified version of physmap, since the flash banks are
physically mapped at 0x2000000 but I needed to partition them
because the BIOS and kernel image are also stored on the same
banks.
> for me on the iPAQ because I wasn't enabling the Vpp voltage
> during write cycles. Is this necessary on your targer?
>
> Other than that, poke the author and/or look at the code
> yourself to see what's happening. What interleave/buswidth
> are you using?
Interleave 2, 4 byte buswidth, to support 2 16 bit chips.
Again, that all looks pretty consistent.
I think it may be some kind of interaction with jffs,
because I've had limited success with creating directories
and deleting files, but not consistently. I'm not sure where
I should look in the jffs code to get more information, though,
and would appreciate some pointers.
Also, when does jffs attempt to clean out the dirty
space? thread_should_wake reports upwards of 2 megs of
dirty space, which is about 16 sectors and 14% of the available
memory. I'd think that should get returned to the free list
much earlier, especially during the reboots.
-Mark Langsdorf
AMD, Inc.
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* Re: Problems with AMD CFI chips
2000-11-02 17:19 Problems with AMD CFI chips mark.langsdorf
@ 2000-11-02 19:16 ` Gregory Schallert
2000-11-02 22:36 ` David Woodhouse
2000-11-02 22:31 ` David Woodhouse
1 sibling, 1 reply; 7+ messages in thread
From: Gregory Schallert @ 2000-11-02 19:16 UTC (permalink / raw)
To: mark.langsdorf; +Cc: mtd
> Also, when does jffs attempt to clean out the dirty
> space?
On an aside, how does jffs schedule the clean up and is this really CPU
intensive?
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* RE: Problems with AMD CFI chips
2000-11-02 17:19 Problems with AMD CFI chips mark.langsdorf
2000-11-02 19:16 ` Gregory Schallert
@ 2000-11-02 22:31 ` David Woodhouse
1 sibling, 0 replies; 7+ messages in thread
From: David Woodhouse @ 2000-11-02 22:31 UTC (permalink / raw)
To: mark.langsdorf; +Cc: mtd
On Thu, 2 Nov 2000 mark.langsdorf@amd.com wrote:
> Interleave 2, 4 byte buswidth, to support 2 16 bit chips.
> Again, that all looks pretty consistent.
Should be fine. ISTR that's what the original author was using.
> I think it may be some kind of interaction with jffs,
> because I've had limited success with creating directories
> and deleting files, but not consistently. I'm not sure where
> I should look in the jffs code to get more information, though,
> and would appreciate some pointers.
Make sure you've got up-to-date JFFS code. Or the code in the 2.4 kernel
is known good.
Hack flash_safe_write() to read back the data afterwards and verify it.
> Also, when does jffs attempt to clean out the dirty
> space? thread_should_wake reports upwards of 2 megs of
> dirty space, which is about 16 sectors and 14% of the available
> memory. I'd think that should get returned to the free list
> much earlier, especially during the reboots.
When the free space goes below gc_minfree_threshold or the dirty space
goes above gc_maxdirty_threshold. These are defined as 5% and 33% of the
total size of the flash partition, respectively.
It's inefficient to GC too much before it's needed. In an ideal world,
we'd always have just enough free space to handle the next write without
having to wait for GC to happen.
--
dwmw2
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* Re: Problems with AMD CFI chips
2000-11-02 19:16 ` Gregory Schallert
@ 2000-11-02 22:36 ` David Woodhouse
0 siblings, 0 replies; 7+ messages in thread
From: David Woodhouse @ 2000-11-02 22:36 UTC (permalink / raw)
To: Gregory Schallert; +Cc: mark.langsdorf, mtd
On Thu, 2 Nov 2000, Gregory Schallert wrote:
> On an aside, how does jffs schedule the clean up and is this really CPU
> intensive?
While the conditions I quoted before are met, the jffs_gcd kernel thread
wakes up and does it in the background.
If the GC thread is ever killed by the user, or for some reason it's
been really slow and we've actually run out of free space, GC can also be
done from the user's context, to make room for a write to happen.
--
dwmw2
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* Re: cfi_cmdset_0001
2000-10-31 17:55 ` David Woodhouse
@ 2000-11-08 16:49 ` Nicolas Pitre
0 siblings, 0 replies; 7+ messages in thread
From: Nicolas Pitre @ 2000-11-08 16:49 UTC (permalink / raw)
To: David Woodhouse; +Cc: mtd
On Tue, 31 Oct 2000, David Woodhouse wrote:
> Note to self: Must produce a proper bug report for Nico for the current
> cfi_cmdset_0001 code, does doesn't work for me on 1x16 devices.
I'm interested in it. I just tested the current code on a GraphicsClient
board with Intel parts. There is apparently a problem withe the buffer
write code. The word write method works well though. Oddly enough, the
buffer write method in my (being deprecated) flash-mem driver has no
problem...
Could you test with the write buffer disabled?
Nicolas
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2000-10-31 17:47 Problems with AMD CFI chips mark.langsdorf
2000-10-31 17:55 ` David Woodhouse
2000-11-08 16:49 ` cfi_cmdset_0001 Nicolas Pitre
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2000-11-02 17:19 Problems with AMD CFI chips mark.langsdorf
2000-11-02 19:16 ` Gregory Schallert
2000-11-02 22:36 ` David Woodhouse
2000-11-02 22:31 ` David Woodhouse
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