* the structs of MTD
@ 2002-04-29 2:35 cafe
2002-04-29 5:44 ` Thomas Gleixner
0 siblings, 1 reply; 2+ messages in thread
From: cafe @ 2002-04-29 2:35 UTC (permalink / raw)
To: linux-mtd
Hi, I'm new to linux-mtd.
I have a SAMSUNG k9F5608U0M flash, 32M NAND Flash Memory.
But the difficulty is I know little about the structs of MTD , such as struct
mtd_chip_driver.
So I don't know how to drive it . can you explain these interrelated struct ?
By the way, please explain detailedly how to drive the forenamed NAND Flash
Memory ?
thanks,
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^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: the structs of MTD
2002-04-29 2:35 the structs of MTD cafe
@ 2002-04-29 5:44 ` Thomas Gleixner
0 siblings, 0 replies; 2+ messages in thread
From: Thomas Gleixner @ 2002-04-29 5:44 UTC (permalink / raw)
To: cafe, linux-mtd
On Monday, 29. April 2002 04:35, wrote:
> Hi, I'm new to linux-mtd.
> I have a SAMSUNG k9F5608U0M flash, 32M NAND Flash Memory.
> But the difficulty is I know little about the structs of MTD , such as
> struct mtd_chip_driver.
> So I don't know how to drive it . can you explain these interrelated
> struct ?
> By the way, please explain detailedly how to drive the forenamed NAND Flash
> Memory ?
This chip is supported by the generic NAND driver already. You need just a
driver for your specific hardware, where you supply baseaddress and access to
CE, ALE and CLE pins. Have a look at drivers/mtd/nand/nand.c (generic nand
driver) and drivers/mtd/nand/autcpu12.c (example for a hardware driver). Use
latest CVS code. It contains all enhancements for NAND support.
The important pieces of the hardware driver are
void autcpu12_hwcontrol(iCONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_NAND=y
nt cmd)
This is the function, which supplies the manipulation of CE, CLE and ALE pins.
int __init autcpu12_init (void)
This is the main init function of the hardware driver
The main points of this function are
/* map physical adress */
autcpu12_fio_base=(unsigned long)ioremap(autcpu12_fio_pbase,SZ_1K);
Remaps the physical base address to a virtual address for driver usage
/* Set address of NAND IO lines */
this->IO_ADDR_R = autcpu12_fio_base;
this->IO_ADDR_W = autcpu12_fio_base;
Set the address for read / write access to the chips data bus. In most cases
the base address.
this->hwcontrol = autcpu12_hwcontrol;
Set the function for access to controllines (CE, CLE, ALE)
this->dev_ready = autcpu12_device_ready;
Give the function to read the ready/busy pin of the chip. If you do not have
access to this pin set it to NULL.
/* 20 us command delay time */
this->chip_delay = 20;
Give a appropriate command delay time according to the chips datasheet.
Supply partitioning information, if you want to use more than one partition
on the chip.
Following CONFIG's should be set
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y <--- if you want to use partitions
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_JFFS2=y <-- If you want to use JFFS2, which is recommended
CONFIG_MTD_NAND_AUTCPU12=y <-- Replace this by your hardware driver
For JFFS2 usage set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_NAND=y
Enjoy.
--
Thomas
___________________________________
autronix automation GmbH
http://www.autronix.de gleixner@autronix.de
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