Re: Fw: corrupt my NAND flash device

[Thomas Gleixner <tglx@linutronix.de>]

On Tuesday 29 April 2003 21:37, Charles Manning wrote:
> > I have tested this with both chiptypes. The erase is aborted and
> > restarted by the erase function.
>
> A couple of comments:
> * "Both chip types" is misleading. There is not just a Toshiba and a
> Samsung chiptype. Each of these vendors provides chips with different
> internal architectures. That is one of the reason characteristics like the
> number of partial page writes etc change.

True. I meant a couple of different types.

> * "Aborted and restarted" is perhaps incorrect. Don't you really mean
> "aborted and re-performed"? I do not believe these parts have a way of
> remembering their internal eraseure state to restart line NOR parts do.

Yep. The command is thrown away according to datasheet and it is issued again 
later. Sorry for misleading expression.

> My other question remains: do you really gain anything by adding the erase
> interruption feature? From a Samsung datasheet:
> * Block erase takes typically 2ms, max 3ms.
> * If you do a reset while the part is erasing, the reset might take as long
> as 500us.
> You then have to restart the erase for it to take another 2ms (unless it
> gets interrupted again).

I have done test on different chips. The erasetime varies a lot. The peak was 
45ms. So that matters IMHO. The specs allow up to 200ms.

> This certainly adds some unpredictability to the behaviour. Most likely it
> does all work, but is it worth it?

Depends. :)

> > It would really be interresting, if those problems are in related to an
> > erase abort. Can anybody insert some debugging in nand_get_chip, where
> > the abort is done?
>
> Yes, it certianly would be interesting.

I think, I have to throw out some harsh remarks again to get an answer on this 
question, as the "hurray, I'm willing to volunteer" replies are not really 
much up to now. :)

-- 
Thomas
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