Re: Toshiba 64M limit and slram (was Toshiba ToPIC developer info)

Re: Toshiba 64M limit and slram (was Toshiba ToPIC developer info)

[Ryan Underwood]

On Wed, Jun 22, 2005 at 10:16:21AM +0100, Russell King wrote:
> 
> Unfortunately, the kernel needs to know how much RAM you really have so
> it can properly allocate memory resources.  Lying to it (by passing mem=)
> is generally a recipe for disaster.

I was under the impression that using the mem= parameter simply
truncated the high memory area, so the kernel would behave as if you
only had that amount of memory installed.

> However, if slram is making use of some area of memory, it really should
> reserve it.  That's a slram bug - please report it to the mtd mailing
> list.

I will do so.  However, it seems impossible for slram to reserve i.e.
64M-160M area unless the kernel is disallowed from using it for other
reasons.  Surely something would be allocated there already by the
time slram was activated.

> Even with slram fixed, there remains the danger of something trying to
> allocate a resource _before_ slram claims its resource...  I just hate
> the entire mem= mess entirely for this very reason.  It's completely
> unsafe.

What is the best thing to do then?  Ever since slram was designed, it
has assumed that the user would set the mem= option appropriately.  I've
had the 'reserve' option pointed to me but not tried it yet.

-- 
Ryan Underwood, <nemesis@icequake.net>

Re: Toshiba 64M limit and slram (was Toshiba ToPIC developer info)

[Russell King]

On Wed, Jun 22, 2005 at 02:55:57PM -0500, Ryan Underwood wrote:
> On Wed, Jun 22, 2005 at 10:16:21AM +0100, Russell King wrote:
> > Unfortunately, the kernel needs to know how much RAM you really have so
> > it can properly allocate memory resources.  Lying to it (by passing mem=)
> > is generally a recipe for disaster.
> 
> I was under the impression that using the mem= parameter simply
> truncated the high memory area, so the kernel would behave as if you
> only had that amount of memory installed.
> 
> > However, if slram is making use of some area of memory, it really should
> > reserve it.  That's a slram bug - please report it to the mtd mailing
> > list.
> 
> I will do so.  However, it seems impossible for slram to reserve i.e.
> 64M-160M area unless the kernel is disallowed from using it for other
> reasons.  Surely something would be allocated there already by the
> time slram was activated.
> 
> > Even with slram fixed, there remains the danger of something trying to
> > allocate a resource _before_ slram claims its resource...  I just hate
> > the entire mem= mess entirely for this very reason.  It's completely
> > unsafe.
> 
> What is the best thing to do then?  Ever since slram was designed, it
> has assumed that the user would set the mem= option appropriately.  I've
> had the 'reserve' option pointed to me but not tried it yet.

Consider what's happening - you're telling the system that you have
less memory than it actually has, so it only reserves (say) the first
512MB of memory.  It then scans the PCI bus and reserves those
resources.

When it comes to allocate a new resource for a PCI device, how does
the kernel know that you _actually_ had (eg) 1GB of RAM - it doesn't
because you told it you only had 512MB.  So it merrily hands out a
new resource at, say, 768MB.

When that happens, it's hardly surprising that the kernel can't
access the PCI device properly.

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:  2.6 Serial core

Re: Toshiba 64M limit and slram (was Toshiba ToPIC developer info)

[Jörn Engel]

On Wed, 22 June 2005 21:10:13 +0100, Russell King wrote:
> 
> Consider what's happening - you're telling the system that you have
> less memory than it actually has, so it only reserves (say) the first
> 512MB of memory.  It then scans the PCI bus and reserves those
> resources.
> 
> When it comes to allocate a new resource for a PCI device, how does
> the kernel know that you _actually_ had (eg) 1GB of RAM - it doesn't
> because you told it you only had 512MB.  So it merrily hands out a
> new resource at, say, 768MB.
> 
> When that happens, it's hardly surprising that the kernel can't
> access the PCI device properly.

I have to agree that slram is a hack.  A proper solution might be to
turn mm/* into a user of the memory address space.  Then we could
explicitly tell mm/* not to use some area and have slram (or rather
phram) take it instead.  Ignoring the stupid names, maybe something
like:

 +----------------------------------------+
 |virtual address space                   |
 |+---------------------------+-----+     |
 ||memory space               | PCI |     |
 ||+-------+-------+          |     |     |
 |||  mm/* | phram |          |     |     |
 ||+-------+-------+          |     |     |
 |+---------------------------+-----+     |
 +----------------------------------------+

Telling mm/* to ignore some space is basically the same operation as
passing mem=.  But the ignored memory is still allocated into the
memory space and cannot be handed out to PCI devices or similar stuff.

Sure, this is major surgery and likely won't happen soon.  But would
it work in principle?

Jörn

-- 
tglx1 thinks that joern should get a (TM) for "Thinking Is Hard"
-- Thomas Gleixner

Re: Toshiba 64M limit and slram (was Toshiba ToPIC developer info)

[Ryan Underwood]

On Wed, Jun 22, 2005 at 09:10:13PM +0100, Russell King wrote:
> > 
> > What is the best thing to do then?  Ever since slram was designed, it
> > has assumed that the user would set the mem= option appropriately.  I've
> > had the 'reserve' option pointed to me but not tried it yet.
> 
> Consider what's happening - you're telling the system that you have
> less memory than it actually has, so it only reserves (say) the first
> 512MB of memory.  It then scans the PCI bus and reserves those
> resources.

I see.  I thought the PCI resources were mapped by the BIOS and not by
the kernel, but this makes a bit more sense now.  So you are also saying
that when a PCI device becomes mapped in that region, subsequent
accesses by the CPU in that range go to physical RAM that is located
there instead of to the device's MMIO range, so the device is
inaccessible.  That would seem odd though, since in the low memory area,
certainly there is RAM underneath the range e.g.  F000:0000-FFFF, but
accesses to that area are mapped to the BIOS ROM instead.  Or the same
for the VGA framebuffer at A000:0, etc.

-- 
Ryan Underwood, <nemesis@icequake.net>