RE: [patch] cfi: prevent kernel panic with cfi flash

Jan Pedersen
2005-10-06T20:19:41Z

> Hmm. Is there a good reason to pick (HZ) instead of (HZ/1000 + 1)?
> The latter would be one jiffy more than 1ms, much closer to intended
> value and still always nonzero.

It is not that important what the value is set to. I just checked the
datasheet, and my flash chips have a word write timing of maximum 210 uS
(typical 9 uS). After the 210 uS, dq5 is raised to indicate a write timeout.
This is detected by the sw, so the 1 ms timeout is never reached unless
there is a bug in hw or sw. Assuming that other flash chips have similar
write timings, 1 ms is enough, however, since the kernel panics instead
doing some retry, reaching the timeout means a dead box. Since the timeout
is initialized BEFORE the first poll, and the last time_after() call is done
AFTER the last poll, the actual timeout might be lower than intended if
jiffies ticks just after timeout initialization. So I simply picked the
value HZ.