Quad Die NAND Chip with 16Gb

Quad Die NAND Chip with 16Gb

[Konstantin Kletschke]

Hi Folks!

Actually I am trying to pimp our NAND driver which already supports
Micron MT29Fxx Chips very well. The last incarnation of these has quad
die and two CE lines, namely CE1 and CE2.

The driver accesses the first two dies by speaking to a CPLD an whenever
Bit0 is accessed it asserts CE1 of NAND, when Bit1 is accessed it
asserts CE2.

#define CPLD_NAND_CE1  0x01 /* Chip Enable1 to NAND Flash */
#define CPLD_NAND_CE2  0x02 /* Chip Enable2 to NAND Flash */
#define CPLD_NAND_ALE  0x04 /* Address Latch Enable to NAND Flash */
#define CPLD_NAND_CLE  0x08 /* Command Latch Enable to NAND Flash */
#define CPLD_NAND_RYBY 0x20 /* RY/BY# input from NAND Flash */

My question is now (as I am not familiar with the driver), how I
implement this doubling of capacitiy into the driver. Where can I best
do this? 
I mean where is the best point of code to kind of double the structures?
has anybody done something like this before?

The driver is at http://www.ludenkalle.de/nand/scb9xxx.c and is adapted
from the other nand drivers there. 

May be somebody has some advices for me :-/

Kind regards, Konsti

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Re: Quad Die NAND Chip with 16Gb

[Konstantin Kletschke]

Replying to myself *mumblegrumble*

I am trying to picture of NAND code and tried this: Why can't I access
the one or the other half of the device?

Platform Setup:

static struct scb9xxx_nand_pdata __initdata nand_pdata = {
        .ce1            = CPLD_NAND_CE2,
        .ale            = CPLD_NAND_ALE,
        .cle            = CPLD_NAND_CLE,
        .rdy            = CPLD_NAND_RYBY,
        .partition_info = nand_partitions,
};

For .ce1 I put CPLD_NAND_CE1 or CPLD_NAND_CE2 and booting yields in seeing
the one or the other half of the device. 
Hardware feels well, so how does stupid konste merge these halfes?
Or could they be accessed as two different mtdblockX as an alternative?

Konsti


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Re: Quad Die NAND Chip with 16Gb

[Konstantin Kletschke]

Am 2007-08-31 17:31 +0200 schrieb Konstantin Kletschke:

> Hardware feels well, so how does stupid konste merge these halfes?

Meanwhile I found the key in passing nr_chips via platform setup to our
device driver, do an nand_scan(mtd, 2) instead of nand_scan(mtd, 1) and
implement a reasonable select_chip() function.

That was all!

Kind regards, Konsti

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