S3C2410 NAND updates

S3C2410 NAND updates

[Ben Dooks]

These are some updates (and a fix) for the S3C2410
NAND controller, for merge after 2.6.25.

S3C2410 Fix previous nFCE suspend save patch

[Ben Dooks]

[-- Attachment #1: simtec/simtec-drivers-mtd-nand-s3c24xx-fixsuspend.patch --]
[-- Type: text/plain, Size: 2252 bytes --]

Commit 03680b1e00d146df718c8a4eac34438566b70c85 incorrectly
was assuming S3C2410_NFCONF was being used to select the
NAND chip. Fix this error by ising the sel_reg.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

Index: linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/drivers/mtd/nand/s3c2410.c	2008-04-15 10:56:07.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c	2008-04-15 11:02:11.000000000 +0100
@@ -118,9 +118,8 @@ struct s3c2410_nand_info {
 	void __iomem			*regs;
 	void __iomem			*sel_reg;
 	int				sel_bit;
-	int				mtd_count;
-
-	unsigned long			save_nfconf;
+	int				mtd_count;       
+	unsigned long			save_sel;
 
 	enum s3c_cpu_type		cpu_type;
 };
@@ -810,15 +809,14 @@ static int s3c24xx_nand_suspend(struct p
 	struct s3c2410_nand_info *info = platform_get_drvdata(dev);
 
 	if (info) {
-		info->save_nfconf = readl(info->regs + S3C2410_NFCONF);
+		info->save_sel = readl(info->sel_reg);
 
 		/* For the moment, we must ensure nFCE is high during
 		 * the time we are suspended. This really should be
 		 * handled by suspending the MTDs we are using, but
 		 * that is currently not the case. */
 
-		writel(info->save_nfconf | info->sel_bit,
-		       info->regs + S3C2410_NFCONF);
+		writel(info->save_sel | info->sel_bit, info->sel_reg);
 
 		if (!allow_clk_stop(info))
 			clk_disable(info->clk);
@@ -830,18 +828,18 @@ static int s3c24xx_nand_suspend(struct p
 static int s3c24xx_nand_resume(struct platform_device *dev)
 {
 	struct s3c2410_nand_info *info = platform_get_drvdata(dev);
-	unsigned long nfconf;
+	unsigned long sel;
 
 	if (info) {
 		clk_enable(info->clk);
 		s3c2410_nand_inithw(info, dev);
-
+		
 		/* Restore the state of the nFCE line. */
 
-		nfconf = readl(info->regs + S3C2410_NFCONF);
-		nfconf &= ~info->sel_bit;
-		nfconf |= info->save_nfconf & info->sel_bit;
-		writel(nfconf, info->regs + S3C2410_NFCONF);
+		sel = readl(info->sel_reg);
+		sel &= ~info->sel_bit;
+		sel |= info->save_sel & info->sel_bit;
+		writel(sel, info->sel_reg);
 
 		if (allow_clk_stop(info))
 			clk_disable(info->clk);

-- 
Ben (ben@fluff.org, http://www.fluff.org/)

  'a smiley only costs 4 bytes'

S3C2410 Large page NAND support

[Ben Dooks]

[-- Attachment #1: simtec/simtec-drivers-mtd-nand-s3c24xx-largepage.patch --]
[-- Type: text/plain, Size: 4288 bytes --]

This adds support for using large page NAND devices
with the S3C24XX NAND controller. This also adds the 
file Documentation/arm/Samsung-S3C24XX/NAND.txt to
describe the differences.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

Index: linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/drivers/mtd/nand/s3c2410.c	2008-04-15 11:02:11.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c	2008-04-15 11:07:09.000000000 +0100
@@ -472,7 +472,7 @@ static int s3c2440_nand_calculate_ecc(st
 	ecc_code[1] = ecc >> 8;
 	ecc_code[2] = ecc >> 16;
 
-	pr_debug("%s: returning ecc %06lx\n", __func__, ecc);
+	pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
 
 	return 0;
 }
@@ -643,9 +643,6 @@ static void s3c2410_nand_init_chip(struc
 		chip->ecc.calculate = s3c2410_nand_calculate_ecc;
 		chip->ecc.correct   = s3c2410_nand_correct_data;
 		chip->ecc.mode	    = NAND_ECC_HW;
-		chip->ecc.size	    = 512;
-		chip->ecc.bytes	    = 3;
-		chip->ecc.layout    = &nand_hw_eccoob;
 
 		switch (info->cpu_type) {
 		case TYPE_S3C2410:
@@ -669,6 +666,34 @@ static void s3c2410_nand_init_chip(struc
 	}
 }
 
+/* s3c2410_nand_update_chip
+ *
+ * post-probe chip update, to change any items, such as the
+ * layout for large page nand
+ */
+
+static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
+				     struct s3c2410_nand_mtd *nmtd)
+{
+	struct nand_chip *chip = &nmtd->chip;
+
+	printk("%s: chip %p: %d\n", __func__, chip, chip->page_shift);
+
+	if (hardware_ecc) {
+		/* change the behaviour depending on wether we are using
+		 * the large or small page nand device */
+
+		if (chip->page_shift > 10) {
+			chip->ecc.size	    = 256;
+			chip->ecc.bytes	    = 3;
+		} else {
+			chip->ecc.size	    = 512;
+			chip->ecc.bytes	    = 3;
+			chip->ecc.layout    = &nand_hw_eccoob;
+		}
+	}
+}
+
 /* s3c2410_nand_probe
  *
  * called by device layer when it finds a device matching
@@ -775,9 +800,12 @@ static int s3c24xx_nand_probe(struct pla
 
 		s3c2410_nand_init_chip(info, nmtd, sets);
 
-		nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
+		nmtd->scan_res = nand_scan_ident(&nmtd->mtd,
+						 (sets) ? sets->nr_chips : 1);
 
 		if (nmtd->scan_res == 0) {
+			s3c2410_nand_update_chip(info, nmtd);
+			nand_scan_tail(&nmtd->mtd);
 			s3c2410_nand_add_partition(info, nmtd, sets);
 		}
 
Index: linux-2.6.25-rc9-quilt2/Documentation/arm/Samsung-S3C24XX/NAND.txt
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.25-rc9-quilt2/Documentation/arm/Samsung-S3C24XX/NAND.txt	2008-04-15 11:07:09.000000000 +0100
@@ -0,0 +1,30 @@
+			S3C24XX NAND Support
+			====================
+
+Introduction
+------------
+
+Small Page NAND
+---------------
+
+The driver uses a 512 byte (1 page) ECC code for this setup. The
+ECC code is not directly compatible with the default kernel ECC
+code, so the driver enforces its own OOB layout and ECC parameters
+
+Large Page NAND
+---------------
+
+The driver is capable of handling NAND flash with a 2KiB page
+size, with support for hardware ECC generation and correction.
+
+Unlike the 512byte page mode, the driver generates ECC data for
+each 256 byte block in an 2KiB page. This means that more than
+one error in a page can be rectified. It also means that the
+OOB layout remains the default kernel layout for these flashes.
+
+
+Document Author
+---------------
+
+Ben Dooks, Copyright 2007 Simtec Electronics
+
Index: linux-2.6.25-rc9-quilt2/Documentation/arm/Samsung-S3C24XX/Overview.txt
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/Documentation/arm/Samsung-S3C24XX/Overview.txt	2008-04-15 10:55:50.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/Documentation/arm/Samsung-S3C24XX/Overview.txt	2008-04-15 11:07:09.000000000 +0100
@@ -156,6 +156,8 @@ NAND
   controller. If there are any problems the latest linux-mtd
   code can be found from http://www.linux-mtd.infradead.org/
 
+  For more information see Documentation/arm/Samsung-S3C24XX/NAND.txt
+
 
 Serial
 ------

-- 
Ben (ben@fluff.org, http://www.fluff.org/)

  'a smiley only costs 4 bytes'

S3C2410 Allow unset ecc to be ignored for ecc correction

[Ben Dooks]

[-- Attachment #1: simtec/simtec-drivers-mtd-nand-s3c2410-ignore-unset-ecc.patch --]
[-- Type: text/plain, Size: 1822 bytes --]

If a block's ecc field is all 0xff, then ignore the ECC
correction. This is for systems where some of the blocks,
such as the initial cramfs are written without ECC and
need to be loaded on start.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

Index: linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/drivers/mtd/nand/s3c2410.c	2008-04-15 11:07:09.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c	2008-04-15 11:07:20.000000000 +0100
@@ -357,6 +357,14 @@ static int s3c2410_nand_correct_data(str
 	if (diff0 == 0 && diff1 == 0 && diff2 == 0)
 		return 0;		/* ECC is ok */
 
+	/* sometimes people do not think about using the ECC, so check
+	 * to see if we have an 0xff,0xff,0xff read ECC and then ignore
+	 * the error, on the assumption that this is an un-eccd page.
+	 */
+	if (read_ecc[0] == 0xff && read_ecc[1] == 0xff && read_ecc[2] == 0xff
+	    && info->platform->ignore_unset_ecc)
+		return 0;
+
 	/* Can we correct this ECC (ie, one row and column change).
 	 * Note, this is similar to the 256 error code on smartmedia */
 
Index: linux-2.6.25-rc9-quilt2/include/asm-arm/plat-s3c/nand.h
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/include/asm-arm/plat-s3c/nand.h	2008-04-15 10:55:44.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/include/asm-arm/plat-s3c/nand.h	2008-04-15 11:07:20.000000000 +0100
@@ -36,6 +36,8 @@ struct s3c2410_platform_nand {
 	int	twrph0;	/* active time for nWE/nOE */
 	int	twrph1;	/* time for release CLE/ALE from nWE/nOE inactive */
 
+	unsigned int	ignore_unset_ecc : 1;
+
 	int			nr_sets;
 	struct s3c2410_nand_set *sets;
 

-- 
Ben (ben@fluff.org, http://www.fluff.org/)

  'a smiley only costs 4 bytes'

S3C2410 Allow ECC layout to be passed through platform data

[Ben Dooks]

[-- Attachment #1: simtec/simtec-drivers-mtd-nand-s3c2410-specify-oob.patch --]
[-- Type: text/plain, Size: 1270 bytes --]

Add support for the ECC layout to be passed via the
platform data specified by the board.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

Index: linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/drivers/mtd/nand/s3c2410.c	2008-04-15 11:07:20.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c	2008-04-15 11:07:26.000000000 +0100
@@ -672,6 +672,9 @@ static void s3c2410_nand_init_chip(struc
 	} else {
 		chip->ecc.mode	    = NAND_ECC_SOFT;
 	}
+
+	if (set->ecc_layout != NULL)
+		chip->ecc.layout = set->ecc_layout;
 }
 
 /* s3c2410_nand_update_chip
Index: linux-2.6.25-rc9-quilt2/include/asm-arm/plat-s3c/nand.h
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/include/asm-arm/plat-s3c/nand.h	2008-04-15 11:07:20.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/include/asm-arm/plat-s3c/nand.h	2008-04-15 11:07:26.000000000 +0100
@@ -27,6 +27,7 @@ struct s3c2410_nand_set {
 	char			*name;
 	int			*nr_map;
 	struct mtd_partition	*partitions;
+	struct nand_ecclayout	*ecc_layout;
 };
 
 struct s3c2410_platform_nand {

-- 
Ben (ben@fluff.org, http://www.fluff.org/)

  'a smiley only costs 4 bytes'

S3C2410 Allow ECC disable to be specified by the board

[Ben Dooks]

[-- Attachment #1: simtec/simtec-drivers-mtd-nand-s3c2410-disable-ecc.patch --]
[-- Type: text/plain, Size: 1243 bytes --]

Add support to disable ECC checking for a given chip
when passed by the board via the platform data.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

Index: linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/drivers/mtd/nand/s3c2410.c	2008-04-15 11:07:26.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/drivers/mtd/nand/s3c2410.c	2008-04-15 11:07:28.000000000 +0100
@@ -675,6 +675,9 @@ static void s3c2410_nand_init_chip(struc
 
 	if (set->ecc_layout != NULL)
 		chip->ecc.layout = set->ecc_layout;
+
+	if (set->disable_ecc)
+		chip->ecc.mode	= NAND_ECC_NONE;
 }
 
 /* s3c2410_nand_update_chip
Index: linux-2.6.25-rc9-quilt2/include/asm-arm/plat-s3c/nand.h
===================================================================
--- linux-2.6.25-rc9-quilt2.orig/include/asm-arm/plat-s3c/nand.h	2008-04-15 11:07:26.000000000 +0100
+++ linux-2.6.25-rc9-quilt2/include/asm-arm/plat-s3c/nand.h	2008-04-15 11:07:28.000000000 +0100
@@ -22,6 +22,8 @@
 */
 
 struct s3c2410_nand_set {
+	unsigned int		disable_ecc : 1;
+
 	int			nr_chips;
 	int			nr_partitions;
 	char			*name;

-- 
Ben (ben@fluff.org, http://www.fluff.org/)

  'a smiley only costs 4 bytes'

Re: S3C2410 NAND updates

[Matt Reimer]

On Tue, Apr 15, 2008 at 3:36 AM, Ben Dooks <ben-mtd@fluff.org> wrote:
> These are some updates (and a fix) for the S3C2410
>  NAND controller, for merge after 2.6.25.

Ben,

If you have time, can you review the following patch? It has been
reported to work on s3c2410, s3c2412, and s3c2440, and has been acked
by Jörn Engel.

http://lists.infradead.org/pipermail/linux-mtd/2007-October/019586.html

Matt

Re: S3C2410 NAND updates

[Matt Reimer]

On Tue, Apr 15, 2008 at 11:30 AM, Matt Reimer <mattjreimer@gmail.com> wrote:
> On Tue, Apr 15, 2008 at 3:36 AM, Ben Dooks <ben-mtd@fluff.org> wrote:
>  > These are some updates (and a fix) for the S3C2410
>  >  NAND controller, for merge after 2.6.25.
>
>  Ben,
>
>  If you have time, can you review the following patch? It has been
>  reported to work on s3c2410, s3c2412, and s3c2440, and has been acked
>  by Jörn Engel.

Double oops; it's already in. I was looking at an old tree. Sorry for the noise.

Matt