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Date: Fri, 7 Nov 2008 05:57:08 +0000
From: Jamie Lokier <jamie@shareable.org>
To: Trent Piepho <tpiepho@freescale.com>
Subject: Re: flash read performance
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Cc: Arnaud Mouiche <arnaud.mouiche@thomson.net>,
	Andre Puschman <andre.puschmann@imms.de>,
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Trent Piepho wrote:
> On Fri, 7 Nov 2008, Jamie Lokier wrote:
> > Based on Andre's observation, I will soon try enabling cache for my
> > NOR, and see if it makes a difference to cold-cache read performance.
> > I don't expect it, but it's worth a try.
> 
> It possible it could help by efficiently doing the reads back-to-back with
> no wasted cycles between them.  I think it's necessary if you want to
> benefit from page mode, but that's something I haven't tried yet.
> 
> > You might also find the write operation to be unreliable, if the
> > caching mode is write-back rather than write-through.
> 
> Proper use of "sync" instructions, or whatever the arch uses to insure that
> writel() is strictly ordered should fix that.

I think that won't work because strongly ordered writes don't
translate directly to bus transactions when the region is mapped with
ioremap_cached().  The flash wants exact bus transactions.

-- Jamie