Re: query: nand read/write method for 2048 + 64 byte page

[David Brownell <david-b@pacbell.net>]

On Friday 26 June 2009, vimal singh wrote:
> The problem is that HW ECC engine in BCH mode dose not provide any
> possible configuration where we can keep ECC bytes in main area
> itself. OOB + ECC data has to be in only spare area.

Healthy.  I disike that "infix OOB" myself.  It is however
a standard ECC mode in the NAND framework.  :(

So you're asking about how to map hardware-specific details
to the NAND framework?  That wasn't clear.


> Would it not be the good idea to perform read/write for full (2112 bytes) page?

I'm not sure I can answer that without reading up on that
particular NAND ECC engine.

Recall however that the NAND framework will think in terms
of 2KB reads, with OOB data on the side.  There will be
separate reads for 2K and then 64 bytes.


> And enable HW_ECC before read/write and then call for ecc.calculate or
> ecc.correct accordingly. Rest all things can be taken care by
> underlying controller driver.

Those sentences seem to elide critical parts of the process.
Like the details of OOB and ECC handling, which seem to be
what you're not sure of...