From: Andrew Morton <akpm@linux-foundation.org>
To: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: nsnehaprabha@ti.com,
davinci-linux-open-source@linux.davincidsp.com,
linux-mtd@lists.infradead.org, dwmw2@infradead.org
Subject: Re: [PATCH] mtd-nand: davinci: correct 4-bit error correction
Date: Fri, 9 Jul 2010 15:39:32 -0700 [thread overview]
Message-ID: <20100709153932.0a6cdbcd.akpm@linux-foundation.org> (raw)
In-Reply-To: <1278653389-12019-1-git-send-email-sudhakar.raj@ti.com>
On Fri, 9 Jul 2010 10:59:49 +0530
Sudhakar Rajashekhara <sudhakar.raj@ti.com> wrote:
> +
> + /*
> + * ECC_STATE field reads 0x3 (Error correction complete) immediately
> + * after setting the 4BITECC_ADD_CALC_START bit. So if you immediately
> + * begin trying to poll for the state, you may fall right out of your
> + * loop without any of the correction calculations having taken place.
> + * The recommendation from the hardware team is to wait till ECC_STATE
> + * reads less than 4, which means ECC HW has entered correction state.
> + */
> + do {
> + ecc_state = (davinci_nand_readl(info,
> + NANDFSR_OFFSET) >> 8) & 0x0f;
> + cpu_relax();
> + } while ((ecc_state < 4) && time_before(jiffies, timeo));
An up-to-100-milliseond busy wait is pretty bad. For how long do you
expect this to spin in practice?
next prev parent reply other threads:[~2010-07-09 22:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-09 5:29 [PATCH] mtd-nand: davinci: correct 4-bit error correction Sudhakar Rajashekhara
2010-07-09 22:39 ` Andrew Morton [this message]
2010-07-12 6:28 ` Sudhakar Rajashekhara
2010-07-13 9:32 ` Sudhakar Rajashekhara
2010-07-13 17:41 ` Andrew Morton
2010-07-14 11:25 ` Sudhakar Rajashekhara
-- strict thread matches above, loose matches on Subject: below --
2009-11-03 10:31 [PATCH] mtd-nand: davinci: Correct " Sudhakar Rajashekhara
2009-11-10 15:05 ` Artem Bityutskiy
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