public inbox for linux-mtd@lists.infradead.org
 help / color / mirror / Atom feed
From: Dong Aisheng <aisheng.dong@freescale.com>
To: Huang Shijie <shijie8@gmail.com>
Cc: Huang Shijie <b32955@freescale.com>,
	shawn.guo@linaro.org, linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, dedekind1@gmail.com
Subject: Re: [PATCH 1/3] ARM: imx6q: add clocks for gpmi-nand
Date: Fri, 29 Jun 2012 10:29:04 +0800	[thread overview]
Message-ID: <20120629022903.GB5844@shlinux2.ap.freescale.net> (raw)
In-Reply-To: <1340941925-14591-1-git-send-email-shijie8@gmail.com>

On Thu, Jun 28, 2012 at 11:52:03PM -0400, Huang Shijie wrote:
> Add clocks for gpmi-nand.
> 
> Signed-off-by: Huang Shijie <shijie8@gmail.com>
> Signed-off-by: Huang Shijie <b32955@freescale.com>
> ---
>  arch/arm/mach-imx/clk-imx6q.c |    8 +++++++-
>  1 files changed, 7 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> index 12d9040..f293bcd 100644
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -151,7 +151,7 @@ enum mx6q_clks {
>  	esai, gpt_ipg, gpt_ipg_per, gpu2d_core, gpu3d_core, hdmi_iahb,
>  	hdmi_isfr, i2c1, i2c2, i2c3, iim, enfc, ipu1, ipu1_di0, ipu1_di1, ipu2,
>  	ipu2_di0, ldb_di0, ldb_di1, ipu2_di1, hsi_tx, mlb, mmdc_ch0_axi,
> -	mmdc_ch1_axi, ocram, openvg_axi, pcie_axi, pwm1, pwm2, pwm3, pwm4,
> +	mmdc_ch1_axi, ocram, openvg_axi, pcie_axi, pwm1, pwm2, pwm3, pwm4, per1_bch,
>  	gpmi_bch_apb, gpmi_bch, gpmi_io, gpmi_apb, sata, sdma, spba, ssi1,
>  	ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
>  	usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
> @@ -357,6 +357,7 @@ int __init mx6q_clocks_init(void)
>  	clk[ocram]        = imx_clk_gate2("ocram",         "ahb",               base + 0x74, 28);
>  	clk[openvg_axi]   = imx_clk_gate2("openvg_axi",    "axi",               base + 0x74, 30);
>  	clk[pcie_axi]     = imx_clk_gate2("pcie_axi",      "pcie_axi_sel",      base + 0x78, 0);
> +	clk[per1_bch]     = imx_clk_gate2("per1_bch",      "usdhc3",            base + 0x78, 12);
>  	clk[pwm1]         = imx_clk_gate2("pwm1",          "ipg_per",           base + 0x78, 16);
>  	clk[pwm2]         = imx_clk_gate2("pwm2",          "ipg_per",           base + 0x78, 18);
>  	clk[pwm3]         = imx_clk_gate2("pwm3",          "ipg_per",           base + 0x78, 20);
> @@ -394,6 +395,11 @@ int __init mx6q_clocks_init(void)
>  	clk_register_clkdev(clk[twd], NULL, "smp_twd");
>  	clk_register_clkdev(clk[usboh3], NULL, "usboh3");
>  	clk_register_clkdev(clk[apbh_dma], NULL, "110000.dma-apbh");
> +	clk_register_clkdev(clk[per1_bch], "per1_bch", NULL);
...
> +	clk_register_clkdev(clk[gpmi_bch_apb], "gpmi_bch_apb", NULL);
> +	clk_register_clkdev(clk[gpmi_bch], "gpmi_bch", NULL);
> +	clk_register_clkdev(clk[gpmi_apb], "gpmi_apb", NULL);
Are above three clocks gpmi private?
If yes, you'd better specify a dev_id for it.

> +	clk_register_clkdev(clk[gpmi_io], NULL, "112000.gpmi-nand");
We had several gpmi clocks here, so i guess it would be good if we have
the con_id set here too to distinguish what's this clock for.

>  	clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
>  	clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
>  	clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");
> -- 
> 1.7.4.4

Regards
Dong Aisheng

  parent reply	other threads:[~2012-06-29  2:29 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-29  3:52 [PATCH 1/3] ARM: imx6q: add clocks for gpmi-nand Huang Shijie
2012-06-29  1:50 ` Shawn Guo
2012-06-29  2:29 ` Dong Aisheng [this message]
2012-06-29  2:57   ` Huang Shijie
2012-06-29  3:03     ` Shawn Guo
2012-06-29  3:52 ` [PATCH 2/3] ARM: imx6q: add DT node for gpmi nand Huang Shijie
2012-06-29  3:10   ` Dong Aisheng
2012-06-29  3:24     ` Huang Shijie
2012-06-29  3:52 ` [PATCH 3/3] mtd: gpmi: change the code for clocks Huang Shijie
2012-06-29  2:06   ` Shawn Guo
2012-06-29  2:32     ` Huang Shijie
2012-06-29  5:52     ` Huang Shijie
2012-06-29  6:33     ` Dong Aisheng
2012-06-29  9:29       ` Lothar Waßmann
2012-06-29  9:34         ` Dong Aisheng
2012-06-29  9:44           ` Lothar Waßmann
2012-06-29  9:54             ` Dong Aisheng
2012-06-29 11:13               ` Shawn Guo
2012-06-29 12:14                 ` Dong Aisheng
2012-06-29 12:41                   ` Shawn Guo
2012-06-29 12:41                     ` Dong Aisheng
2012-06-29 12:53                       ` Shawn Guo
2012-06-29 10:02             ` Huang Shijie
2012-06-29 11:22               ` Shawn Guo
2012-06-30 17:52         ` Mark Brown
2012-06-29  3:35   ` Subodh Nijsure

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20120629022903.GB5844@shlinux2.ap.freescale.net \
    --to=aisheng.dong@freescale.com \
    --cc=b32955@freescale.com \
    --cc=dedekind1@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=shawn.guo@linaro.org \
    --cc=shijie8@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox