From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VMlc9-0000Vh-Vo for linux-mtd@lists.infradead.org; Thu, 19 Sep 2013 21:18:18 +0000 Date: Thu, 19 Sep 2013 18:17:29 -0300 From: Ezequiel Garcia To: Daniel Mack Subject: Re: [PATCH 00/21] Armada 370/XP NAND support Message-ID: <20130919211727.GC3369@localhost> References: <1379606505-2529-1-git-send-email-ezequiel.garcia@free-electrons.com> <523B38BE.2010203@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <523B38BE.2010203@gmail.com> Cc: Thomas Petazzoni , Lior Amsalem , Jason Cooper , Tawfik Bayouk , Artem Bityutskiy , linux-mtd@lists.infradead.org, Gregory Clement , Brian Norris , Willy Tarreau List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Thu, Sep 19, 2013 at 07:47:42PM +0200, Daniel Mack wrote: > On 19.09.2013 18:01, Ezequiel Garcia wrote: > > > Ezequiel Garcia (21): > > mtd: nand: pxa3xx: Allocate data buffer on detected flash size > > mtd: nand: pxa3xx: Disable OOB on arbitrary length commands > > mtd: nand: pxa3xx: Use a completion to signal device ready > > mtd: nand: pxa3xx: Add bad block handling > > mtd: nand: pxa3xx: Add driver-specific ECC BCH support > > mtd: nand: pxa3xx: Configure detected pages-per-block > > mtd: nand: pxa3xx: Clear cmd buffer #3 (NDCB3) on command start > > mtd: nand: pxa3xx: Make config menu show supported platforms > > mtd: nand: pxa3xx: Split FIFO size from to-be-read FIFO count > > mtd: nand: pxa3xx: Replace host->page_size by mtd->writesize > > mtd: nand: pxa3xx: Add helper function to set page address > > mtd: nand: pxa3xx: Remove READ0 switch/case falltrough > > mtd: nand: pxa3xx: Split prepare_command_pool() in two stages > > mtd: nand: pxa3xx: Move the data buffer clean to > > prepare_start_command() > > mtd: nand: pxa3xx: Add a read/write buffers markers > > mtd: nand: pxa3xx: Introduce multiple page I/O support > > mtd: nand: pxa3xx: Add multiple chunk write support > > Your patches work fine on my board with CONFIG_HAS_DMA=n. > > However, it seems that with CONFIG_HAS_DMA=y, pxa3xx_nand_irq() is now > called before pxa3xx_nand_init_buff(), which results in a NULL pointer > dereference. Yup, the problem is very clear: pxa3xx_nand_irq() is now called before pxa3xx_nand_init_buff() because there must be a first device detection to know which size the page will be. Then pxa3xx_nand_init_buff() is called with this detected page size. See the first patch "Allocate data buffer on detected flash size", which removes the need to always allocate a buffer as big as the biggest page, and tries to be smarter. Of course, this doesn't work for DMA transfers. I guess the first device detection should be done by PIO always. If you agree with this I'll re-work the patches. Thanks for testing! -- Ezequiel GarcĂ­a, Free Electrons Embedded Linux, Kernel and Android Engineering http://free-electrons.com