From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
To: Brian Norris <computersforpeace@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Lior Amsalem <alior@marvell.com>,
Jason Cooper <jason@lakedaemon.net>,
Tawfik Bayouk <tawfik@marvell.com>,
Artem Bityutskiy <dedekind1@gmail.com>,
Daniel Mack <zonque@gmail.com>,
linux-mtd@lists.infradead.org,
Gregory Clement <gregory.clement@free-electrons.com>,
Willy Tarreau <w@1wt.eu>
Subject: Re: [PATCH 03/21] mtd: nand: pxa3xx: Use a completion to signal device ready
Date: Wed, 16 Oct 2013 17:23:49 -0300 [thread overview]
Message-ID: <20131016202348.GA3232@localhost> (raw)
In-Reply-To: <20131004185454.GA20476@localhost>
On Fri, Oct 04, 2013 at 03:54:54PM -0300, Ezequiel Garcia wrote:
> Brian,
>
> First of all: thanks for all your nice feedback.
> I'm going through all of it right now, and just started
> by this one.
>
> On Wed, Oct 02, 2013 at 02:56:28PM -0700, Brian Norris wrote:
> > On Thu, Sep 19, 2013 at 01:01:27PM -0300, Ezequiel Garcia wrote:
> > > Apparently, the expected behavior of the waitfunc() NAND chip call
> > > is to wait for the device to be READY (this is a standard chip line).
> > > However, the current implementation does almost nothing, which opens
> > > a possibility to issue a command to a non-ready device.
> > >
> > > Fix this by adding a new completion to wait for the ready event to arrive.
> > >
> > > Because the "is ready" flag is cleared from the controller status
> > > register, it's needed to store that state in the driver, and because the
> > > field is accesed from an interruption, the field needs to be of an
> > > atomic type.
> >
> > Does it really need to be an atomic type? AIUI, you can hand off exclusive
> > control to the hardware when you begin a command. So the rest of the driver would be
> > inactive when the IRQ handler is setting the ready flag. And similarly,
> > the hardware should be inactive (i.e., no interrupts) when you are
> > modifying the ready flag in the driver (i.e., in cmdfunc).
> >
>
> Hm... I think that's not the case, and that's exactly why I had to add
> an atomic type. See below.
>
> > Or perhaps I'm misunderstanding something.
> >
> > > Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
> > > ---
> > > drivers/mtd/nand/pxa3xx_nand.c | 45 +++++++++++++++++++++++++++++-------------
> > > 1 file changed, 31 insertions(+), 14 deletions(-)
> > >
> > > diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> > > index a8d2ea7..fba91c2 100644
> > > --- a/drivers/mtd/nand/pxa3xx_nand.c
> > > +++ b/drivers/mtd/nand/pxa3xx_nand.c
> > > @@ -35,6 +35,7 @@
> > >
> > > #include <linux/platform_data/mtd-nand-pxa3xx.h>
> > >
> > > +#define NAND_DEV_READY_TIMEOUT 50
> > > #define CHIP_DELAY_TIMEOUT (2 * HZ/10)
> > > #define NAND_STOP_DELAY (2 * HZ/50)
> > > #define PAGE_CHUNK_SIZE (2048)
> > > @@ -167,7 +168,7 @@ struct pxa3xx_nand_info {
> > > struct clk *clk;
> > > void __iomem *mmio_base;
> > > unsigned long mmio_phys;
> > > - struct completion cmd_complete;
> > > + struct completion cmd_complete, dev_ready;
> >
> > Do you really need two completion structures? Does 'device ready' always
> > follow 'command complete', so that you can just use 'device ready' all
> > the time? And if so, does it make sense to just use dev_ready?
> >
> > >
> > > unsigned int buf_start;
> > > unsigned int buf_count;
>
> The idea here is to handle the following situation. After a command is
> completed (which also applies to the 'chunked' page command we want to
> support later in the patchset) the controller sets a 'command done' flag
> in the ISR.
>
> The interruption handler calls the command done completion which causes
> the cmdfunc to finish waiting and exit (or continue executing commands
> in the 'chunked' case).
>
> Notice that this does *not* guarantee the controller is ready since the
> 'ready' flag is independent of the 'command complete' flag and the IRQ can
> arrive at any later point.
>
> Let's suppose the cmdfunc() has exited, and the NAND base code is going to
> continue the operation. In the PAGEPROG case, the NAND base calls waitfunc()
> before continuing the operation.
>
> At that point, we **need** to wait for the 'ready' flag because otherwise
> the NAND base could issue another PAGEPROG command, while the controller
> is not really ready to receive it.
>
> However, if we enter the waitfunc() we want to read the info->is_ready flag
> to check the completion has been initialized and a wait is suitable.
> Otherwise, some commands that are not issued (with no wait completion
> initialized) will stall at that waitfunc().
>
> While at the waitfunc() the interruption handler might get called for
> the 'ready' flag and so the info->is_ready variable gets access from two
> different execution contexts.
>
> Given the above behavior, I thought the only way of dealing with this
> was to add a new completion and use atomic type for the is_ready flag.
>
> Is the above clear? Do you think the implementation is correct for the
> behavior?
Brian:
I'm picking up on my NAND work, and wanted to know if you have any
comments about this patch. Otherwise, I'll just leave it as it is.
FWIW, any comments about the locking scheme is always highly appreciated
as it's a complex and important issue, so feel free to ask any questions
or suggest any improvements.
Thanks,
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
next prev parent reply other threads:[~2013-10-16 20:24 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-19 16:01 [PATCH 00/21] Armada 370/XP NAND support Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 01/21] mtd: nand: pxa3xx: Allocate data buffer on detected flash size Ezequiel Garcia
2013-09-26 20:10 ` Brian Norris
2013-09-30 12:37 ` Ezequiel Garcia
2013-10-02 21:14 ` Brian Norris
2013-09-19 16:01 ` [PATCH 02/21] mtd: nand: pxa3xx: Disable OOB on arbitrary length commands Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 03/21] mtd: nand: pxa3xx: Use a completion to signal device ready Ezequiel Garcia
2013-10-02 21:56 ` Brian Norris
2013-10-04 18:54 ` Ezequiel Garcia
2013-10-16 20:23 ` Ezequiel Garcia [this message]
2013-09-19 16:01 ` [PATCH 04/21] mtd: nand: pxa3xx: Add bad block handling Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 05/21] mtd: nand: pxa3xx: Add driver-specific ECC BCH support Ezequiel Garcia
2013-10-03 0:24 ` Brian Norris
2013-10-04 19:49 ` Ezequiel Garcia
2013-10-05 0:27 ` Brian Norris
2013-10-17 22:27 ` Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 06/21] mtd: nand: pxa3xx: Configure detected pages-per-block Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 07/21] mtd: nand: pxa3xx: Clear cmd buffer #3 (NDCB3) on command start Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 08/21] mtd: nand: pxa3xx: Make config menu show supported platforms Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 09/21] mtd: nand: pxa3xx: Split FIFO size from to-be-read FIFO count Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 10/21] mtd: nand: pxa3xx: Replace host->page_size by mtd->writesize Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 11/21] mtd: nand: pxa3xx: Add helper function to set page address Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 12/21] mtd: nand: pxa3xx: Remove READ0 switch/case falltrough Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 13/21] mtd: nand: pxa3xx: Split prepare_command_pool() in two stages Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 14/21] mtd: nand: pxa3xx: Move the data buffer clean to prepare_start_command() Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 15/21] mtd: nand: pxa3xx: Add a read/write buffers markers Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 16/21] mtd: nand: pxa3xx: Introduce multiple page I/O support Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 17/21] mtd: nand: pxa3xx: Add multiple chunk write support Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 18/21] ARM: mvebu: Add a fixed 0Hz clock to represent NAND clock Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 19/21] ARM: mvebu: Add support for NAND controller in Armada 370/XP Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 20/21] ARM: mvebu: Enable NAND controller in Armada XP GP board Ezequiel Garcia
2013-09-19 16:01 ` [PATCH 21/21] ARM: mvebu: Enable NAND controller in Armada 370 Mirabox Ezequiel Garcia
2013-09-19 17:47 ` [PATCH 00/21] Armada 370/XP NAND support Daniel Mack
2013-09-19 18:34 ` Ezequiel Garcia
2013-09-19 21:17 ` Ezequiel Garcia
2013-09-19 21:26 ` Daniel Mack
2013-09-24 18:59 ` Ezequiel Garcia
2013-09-25 6:27 ` Brian Norris
2013-09-25 10:41 ` Ezequiel Garcia
2013-09-26 19:56 ` Brian Norris
2013-09-30 12:24 ` Ezequiel Garcia
2013-10-03 0:02 ` Brian Norris
2013-10-04 19:42 ` Ezequiel Garcia
2013-10-05 0:06 ` Brian Norris
2013-10-16 23:29 ` Ezequiel Garcia
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