From mboxrd@z Thu Jan  1 00:00:00 1970
Date: Thu, 5 Dec 2013 13:23:33 -0800
From: Brian Norris <computersforpeace@gmail.com>
To: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Subject: Re: [PATCH v5 00/14] Armada 370/XP NAND support
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Cc: Lior Amsalem <alior@marvell.com>,
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On Mon, Dec 02, 2013 at 09:22:26PM -0300, Ezequiel Garcia wrote:
> Now, why does NAND reserve eight blocks, if there are only two tables?
> Well, you'll be able to find this in the driver:
> 
> static struct nand_bbt_descr bbt_main_descr = {
> 	/* stuff */
> 	.maxblocks = 8,         /* Last 8 blocks in each chip */
> };
> 
> The snippet above asks the NAND core to scan the last 8 blocks when searching
> for the in-flash bad block table. The NAND core will also reserve these
> 8 blocks as the maximum amount of blocks that can be used to store a bad
> block table (I guess that's in case one block gets 'really' bad).

That doesn't reflect mainline, where you'll see:

static struct nand_bbt_descr bbt_main_descr = {
...
        .maxblocks = NAND_BBT_SCAN_MAXBLOCKS,
...
};

Where NAND_BBT_SCAN_MAXBLOCKS == 4.

Do you have local modifications that make .maxblocks = 8?

Brian