Re: NAND support for Armada 370

[Rodolfo Giometti <giometti@enneenne.com>]

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On Wed, Jan 08, 2014 at 08:36:03PM -0300, Ezequiel Garcia wrote:
> Hi Rodolfo,
> 
> Sorry for being so unresponsive these days, I've been on vacation.
> I'll review your patch on Monday.

Ok.

> In fact, already took a quick look and it looks good. I have a few
> doubts:
> 
> 1. Do we need the ECC layout? (MTD already provides defaults)

Ok, I did some testes and we can safely remove it! :)

> 2. Is this compatible with Marvell's U-Boot? (can you write from U-Boot,
> and read from Linux, and viceversa?)

Till now all our tests are ok! :)

Attached is the new patch release.

Ciao,

Rodolfo

-- 

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>From 4463f70a77f6aaea216b53e620171c37fb1d4eb3 Mon Sep 17 00:00:00 2001
From: Rodolfo Giometti <giometti@linux.it>
Date: Mon, 6 Jan 2014 16:18:49 +0100
Subject: [PATCH] mtd pxa3xx_nand.c: add support for 2048 bytes page size
 layout

Tested-by: Michele Dionisio <michele@cynny.com>
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
---
 drivers/mtd/nand/pxa3xx_nand.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 31aae53..fdc179c 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1360,6 +1360,16 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 	 * Required ECC: 4-bit correction per 512 bytes
 	 * Select: 16-bit correction per 2048 bytes
 	 */
+	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 2048) {
+		info->ecc_bch = 1;
+		info->chunk_size = 2048;
+		info->spare_size = 32;
+		info->ecc_size = 32;
+		ecc->mode = NAND_ECC_HW;
+		ecc->size = info->chunk_size;
+		ecc->strength = 16;
+		return 1;
+
 	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
 		info->ecc_bch = 1;
 		info->chunk_size = 2048;
-- 
1.8.1.2