From mboxrd@z Thu Jan 1 00:00:00 1970 Date: Thu, 13 Mar 2014 17:05:46 -0300 From: Ezequiel Garcia To: Sergei Shtylyov Subject: Re: [PATCH v2 3/6] ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs Message-ID: <20140313200546.GB30590@arch.cereza> References: <1394739542-30017-1-git-send-email-ezequiel@vanguardiasur.com.ar> <1394739542-30017-4-git-send-email-ezequiel@vanguardiasur.com.ar> <53221B41.2030001@cogentembedded.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <53221B41.2030001@cogentembedded.com> Cc: Lior Amsalem , devicetree@vger.kernel.org, Mike Turquette , Jason Cooper , Tawfik Bayouk , Andrew Lunn , Seif Mazareeb , linux-mtd@lists.infradead.org, Ezequiel Garcia , Gregory Clement , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Mar 13, Sergei Shtylyov wrote: > Hello. > > On 03/13/2014 10:38 PM, Ezequiel Garcia wrote: > > >From: Ezequiel Garcia > > >The Armada 38x SoC family has a clock provider called "Core Divider", > >derived from the fixed 2 GHz main PLL clock. This is similar to the > >one on A370, A375 and AXP. > > >Signed-off-by: Ezequiel Garcia > >--- > > arch/arm/boot/dts/armada-38x.dtsi | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > >diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi > >index 38fc3a0..76cc27e 100644 > >--- a/arch/arm/boot/dts/armada-38x.dtsi > >+++ b/arch/arm/boot/dts/armada-38x.dtsi > >@@ -337,6 +337,14 @@ > > compatible = "marvell,orion-mdio"; > > reg = <0x72004 0x4>; > > }; > >+ > >+ coredivclk: corediv-clock@e4250 { > > I would suggest naming the device just "clock@e4250" on the same grounds > of having the generic device names. > Right, I overlooked this. -- Ezequiel García, Free Electrons Embedded Linux, Kernel and Android Engineering http://free-electrons.com