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 for linux-mtd@lists.infradead.org; Fri, 25 Apr 2014 16:06:24 +0000
From: Marek Vasut <marex@denx.de>
To: Huang Shijie <b32955@freescale.com>
Subject: Re: [PATCH V3] Add support for flag status register on Micron chips.
Date: Fri, 25 Apr 2014 17:50:54 +0200
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Cc: Graham Moore <ggrahammoore@gmail.com>,
 Insop Song <insop.song@gainspeed.com>, Sascha Hauer <s.hauer@pengutronix.de>,
 Jingoo Han <jg1.han@samsung.com>,
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 Alan Tull <atull@altera.com>, Sourav Poddar <sourav.poddar@ti.com>,
 Brian Norris <computersforpeace@gmail.com>,
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On Friday, April 25, 2014 at 06:47:04 AM, Huang Shijie wrote:
> On Tue, Apr 22, 2014 at 01:48:21PM -0500, Graham Moore wrote:
> > On Tue, Apr 22, 2014 at 11:55 AM, Marek Vasut <marex@denx.de> wrote:
> > > Are you sure the n25q512a doesn't use FSR ? Do n25q512a{1,8}3 share the
> > > same IDs?
> > 
> > I looked at the datasheet and the n25q512a *does* have the same FSR
> > usage note, so I suppose I should add USE_FSR to it as well.  But how
> > is it working now?  Maybe nobody is actually using that chip.
> > Yes, n25q512a{1,8}3 share the same id, 0x20ba20.
> 
> could use the ext_id to distinguish them ? just as we did for Spansion NOR.
> 
> i dumped out 5 bytes of my n25q256a: 0x20, 0xba, 0x19, 0x10, 0x00.

The q256 and q512 are rather different chips it seems to me ...

Best regards,
Marek Vasut