* [PATCH 1/1] mtd: fsl-quadspi: improve read performance by increase AHB transfer size
@ 2015-01-13 16:28 Frank.Li
2015-01-14 1:20 ` Huang Shijie
2015-02-06 4:05 ` Brian Norris
0 siblings, 2 replies; 3+ messages in thread
From: Frank.Li @ 2015-01-13 16:28 UTC (permalink / raw)
To: computersforpeace, shijie8, lznuaa, linux-mtd; +Cc: Allen Xu, Frank Li
From: Allen Xu <b45815@freescale.com>
Set AHB transfer size to 1K which improved the read performance.
Add ahb_buf_size field in fsl_qspi_devtype_data to denote the size for
different SoC.
Before:
root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16
16+0 records in
16+0 records out
16777216 bytes (17 MB) copied, 0.472183 s, 25.1 MB/s
After:
root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16
16+0 records in
16+0 records out
16777216 bytes (17 MB) copied, 0.369439 s, 29.5 MB/s
Signed-off-by: Allen Xu <b45815@freescale.com>
Signed-off-by: Huang Shijie <shijie8@gmail.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
---
drivers/mtd/spi-nor/fsl-quadspi.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index 9d608007..75d6898 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -57,7 +57,9 @@
#define QUADSPI_BUF3CR 0x1c
#define QUADSPI_BUF3CR_ALLMST_SHIFT 31
-#define QUADSPI_BUF3CR_ALLMST (1 << QUADSPI_BUF3CR_ALLMST_SHIFT)
+#define QUADSPI_BUF3CR_ALLMST_MASK (1 << QUADSPI_BUF3CR_ALLMST_SHIFT)
+#define QUADSPI_BUF3CR_ADATSZ_SHIFT 8
+#define QUADSPI_BUF3CR_ADATSZ_MASK (0xFF << QUADSPI_BUF3CR_ADATSZ_SHIFT)
#define QUADSPI_BFGENCR 0x20
#define QUADSPI_BFGENCR_PAR_EN_SHIFT 16
@@ -198,18 +200,21 @@ struct fsl_qspi_devtype_data {
enum fsl_qspi_devtype devtype;
int rxfifo;
int txfifo;
+ int ahb_buf_size;
};
static struct fsl_qspi_devtype_data vybrid_data = {
.devtype = FSL_QUADSPI_VYBRID,
.rxfifo = 128,
- .txfifo = 64
+ .txfifo = 64,
+ .ahb_buf_size = 1024
};
static struct fsl_qspi_devtype_data imx6sx_data = {
.devtype = FSL_QUADSPI_IMX6SX,
.rxfifo = 128,
- .txfifo = 512
+ .txfifo = 512,
+ .ahb_buf_size = 1024
};
#define FSL_QSPI_MAX_CHIP 4
@@ -583,7 +588,12 @@ static void fsl_qspi_init_abh_read(struct fsl_qspi *q)
writel(QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF0CR);
writel(QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF1CR);
writel(QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF2CR);
- writel(QUADSPI_BUF3CR_ALLMST, base + QUADSPI_BUF3CR);
+ /*
+ * Set ADATSZ with the maximum AHB buffer size to improve the
+ * read performance.
+ */
+ writel(QUADSPI_BUF3CR_ALLMST_MASK | ((q->devtype_data->ahb_buf_size / 8)
+ << QUADSPI_BUF3CR_ADATSZ_SHIFT), base + QUADSPI_BUF3CR);
/* We only use the buffer3 */
writel(0, base + QUADSPI_BUF0IND);
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] mtd: fsl-quadspi: improve read performance by increase AHB transfer size
2015-01-13 16:28 [PATCH 1/1] mtd: fsl-quadspi: improve read performance by increase AHB transfer size Frank.Li
@ 2015-01-14 1:20 ` Huang Shijie
2015-02-06 4:05 ` Brian Norris
1 sibling, 0 replies; 3+ messages in thread
From: Huang Shijie @ 2015-01-14 1:20 UTC (permalink / raw)
To: Frank.Li; +Cc: lznuaa, linux-mtd, Allen Xu, computersforpeace, shijie8
On Wed, Jan 14, 2015 at 12:28:56AM +0800, Frank.Li@freescale.com wrote:
> From: Allen Xu <b45815@freescale.com>
>
> Set AHB transfer size to 1K which improved the read performance.
>
> Add ahb_buf_size field in fsl_qspi_devtype_data to denote the size for
> different SoC.
>
> Before:
>
> root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16
> 16+0 records in
> 16+0 records out
> 16777216 bytes (17 MB) copied, 0.472183 s, 25.1 MB/s
>
> After:
>
> root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16
> 16+0 records in
> 16+0 records out
> 16777216 bytes (17 MB) copied, 0.369439 s, 29.5 MB/s
>
> Signed-off-by: Allen Xu <b45815@freescale.com>
> Signed-off-by: Huang Shijie <shijie8@gmail.com>
> Signed-off-by: Frank Li <Frank.Li@freescale.com>
This is a very good patch.
This patch has my signed-off, but if it is needed, please add my ack:
Acked-by: Huang Shijie <shijie.huang@intel.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] mtd: fsl-quadspi: improve read performance by increase AHB transfer size
2015-01-13 16:28 [PATCH 1/1] mtd: fsl-quadspi: improve read performance by increase AHB transfer size Frank.Li
2015-01-14 1:20 ` Huang Shijie
@ 2015-02-06 4:05 ` Brian Norris
1 sibling, 0 replies; 3+ messages in thread
From: Brian Norris @ 2015-02-06 4:05 UTC (permalink / raw)
To: Frank.Li; +Cc: lznuaa, linux-mtd, Allen Xu, shijie8
On Wed, Jan 14, 2015 at 12:28:56AM +0800, Frank.Li@freescale.com wrote:
> From: Allen Xu <b45815@freescale.com>
>
> Set AHB transfer size to 1K which improved the read performance.
>
> Add ahb_buf_size field in fsl_qspi_devtype_data to denote the size for
> different SoC.
>
> Before:
>
> root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16
> 16+0 records in
> 16+0 records out
> 16777216 bytes (17 MB) copied, 0.472183 s, 25.1 MB/s
>
> After:
>
> root@imx6qdlsolo:~# dd if=/dev/mtd1 of=/dev/null bs=1M count=16
> 16+0 records in
> 16+0 records out
> 16777216 bytes (17 MB) copied, 0.369439 s, 29.5 MB/s
>
> Signed-off-by: Allen Xu <b45815@freescale.com>
> Signed-off-by: Huang Shijie <shijie8@gmail.com>
> Signed-off-by: Frank Li <Frank.Li@freescale.com>
Pushed to l2-mtd.git. Thanks.
Brian
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2015-02-06 4:05 UTC | newest]
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2015-01-13 16:28 [PATCH 1/1] mtd: fsl-quadspi: improve read performance by increase AHB transfer size Frank.Li
2015-01-14 1:20 ` Huang Shijie
2015-02-06 4:05 ` Brian Norris
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