* [PATCH V3] mtd: fsl-quadspi: Access multiple chips simultaneously
@ 2015-05-13 19:40 Han Xu
2015-05-20 21:52 ` Brian Norris
0 siblings, 1 reply; 5+ messages in thread
From: Han Xu @ 2015-05-13 19:40 UTC (permalink / raw)
To: computersforpeace, shijie.huang; +Cc: linux-mtd, han.xu
Add supports for simultaneous access to multiple chips. Need to lock
the mutex before any quad spi operations and unlock the mutex after
operations complete.
Signed-off-by: Han Xu <b45815@freescale.com>
---
v2 -- > v3
1. Unlock the mutex if errors occur.
2. Destroy the mutex when module remove or probe fail.
v1 -- > v2
1. Rebase to latest l2-mtd code and resend.
---
drivers/mtd/spi-nor/fsl-quadspi.c | 22 +++++++++++++++++-----
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index 52a872f..e6fc064 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -26,6 +26,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/spi-nor.h>
+#include <linux/mutex.h>
/* The registers */
#define QUADSPI_MCR 0x00
@@ -233,6 +234,7 @@ struct fsl_qspi {
u32 clk_rate;
unsigned int chip_base_addr; /* We may support two chips. */
bool has_second_chip;
+ struct mutex lock;
};
static inline int is_vybrid_qspi(struct fsl_qspi *q)
@@ -761,13 +763,17 @@ static int fsl_qspi_prep(struct spi_nor *nor, enum spi_nor_ops ops)
struct fsl_qspi *q = nor->priv;
int ret;
+ mutex_lock(&q->lock);
ret = clk_enable(q->clk_en);
- if (ret)
+ if (ret) {
+ mutex_unlock(&q->lock);
return ret;
+ }
ret = clk_enable(q->clk);
if (ret) {
clk_disable(q->clk_en);
+ mutex_unlock(&q->lock);
return ret;
}
@@ -781,6 +787,7 @@ static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
clk_disable(q->clk);
clk_disable(q->clk_en);
+ mutex_unlock(&q->lock);
}
static int fsl_qspi_probe(struct platform_device *pdev)
@@ -864,6 +871,8 @@ static int fsl_qspi_probe(struct platform_device *pdev)
if (of_get_property(np, "fsl,qspi-has-second-chip", NULL))
q->has_second_chip = true;
+ mutex_init(&q->lock);
+
/* iterate the subnodes. */
for_each_available_child_of_node(dev->of_node, np) {
char modalias[40];
@@ -892,24 +901,24 @@ static int fsl_qspi_probe(struct platform_device *pdev)
ret = of_modalias_node(np, modalias, sizeof(modalias));
if (ret < 0)
- goto irq_failed;
+ goto mutex_failed;
ret = of_property_read_u32(np, "spi-max-frequency",
&q->clk_rate);
if (ret < 0)
- goto irq_failed;
+ goto mutex_failed;
/* set the chip address for READID */
fsl_qspi_set_base_addr(q, nor);
ret = spi_nor_scan(nor, modalias, SPI_NOR_QUAD);
if (ret)
- goto irq_failed;
+ goto mutex_failed;
ppdata.of_node = np;
ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
if (ret)
- goto irq_failed;
+ goto mutex_failed;
/* Set the correct NOR size now. */
if (q->nor_size == 0) {
@@ -950,6 +959,8 @@ last_init_failed:
i *= 2;
mtd_device_unregister(&q->mtd[i]);
}
+mutex_failed:
+ mutex_destroy(&q->lock);
irq_failed:
clk_disable_unprepare(q->clk);
clk_failed:
@@ -973,6 +984,7 @@ static int fsl_qspi_remove(struct platform_device *pdev)
writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
writel(0x0, q->iobase + QUADSPI_RSER);
+ mutex_destroy(&q->lock);
clk_unprepare(q->clk);
clk_unprepare(q->clk_en);
return 0;
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH V3] mtd: fsl-quadspi: Access multiple chips simultaneously
2015-05-13 19:40 [PATCH V3] mtd: fsl-quadspi: Access multiple chips simultaneously Han Xu
@ 2015-05-20 21:52 ` Brian Norris
2015-05-20 22:28 ` Han Xu
2015-06-23 23:10 ` Brian Norris
0 siblings, 2 replies; 5+ messages in thread
From: Brian Norris @ 2015-05-20 21:52 UTC (permalink / raw)
To: Han Xu; +Cc: shijie.huang, linux-mtd, han.xu
Hi Han,
On Wed, May 13, 2015 at 02:40:57PM -0500, Han Xu wrote:
> Add supports for simultaneous access to multiple chips. Need to lock
> the mutex before any quad spi operations and unlock the mutex after
> operations complete.
>
> Signed-off-by: Han Xu <b45815@freescale.com>
> ---
> v2 -- > v3
> 1. Unlock the mutex if errors occur.
> 2. Destroy the mutex when module remove or probe fail.
>
> v1 -- > v2
> 1. Rebase to latest l2-mtd code and resend.
> ---
>
>
> drivers/mtd/spi-nor/fsl-quadspi.c | 22 +++++++++++++++++-----
> 1 file changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
> index 52a872f..e6fc064 100644
> --- a/drivers/mtd/spi-nor/fsl-quadspi.c
> +++ b/drivers/mtd/spi-nor/fsl-quadspi.c
...
> @@ -761,13 +763,17 @@ static int fsl_qspi_prep(struct spi_nor *nor, enum spi_nor_ops ops)
> struct fsl_qspi *q = nor->priv;
> int ret;
>
> + mutex_lock(&q->lock);
> ret = clk_enable(q->clk_en);
> - if (ret)
> + if (ret) {
> + mutex_unlock(&q->lock);
> return ret;
> + }
>
> ret = clk_enable(q->clk);
> if (ret) {
> clk_disable(q->clk_en);
> + mutex_unlock(&q->lock);
> return ret;
> }
>
I think it'd be better to have a single error path in this function now.
Otherwise, I think this is OK. I can push the appended patch instead, if
that's OK with you.
Signed-off-by: Han Xu <b45815@freescale.com>
[Brian: reworked err path in fsl_qspi_prep()]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
---
drivers/mtd/spi-nor/fsl-quadspi.c | 32 +++++++++++++++++++++++---------
1 file changed, 23 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index 52a872fa1b6e..4fe13dd535f8 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
@@ -26,6 +26,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/spi-nor.h>
+#include <linux/mutex.h>
/* The registers */
#define QUADSPI_MCR 0x00
@@ -233,6 +234,7 @@ struct fsl_qspi {
u32 clk_rate;
unsigned int chip_base_addr; /* We may support two chips. */
bool has_second_chip;
+ struct mutex lock;
};
static inline int is_vybrid_qspi(struct fsl_qspi *q)
@@ -761,18 +763,24 @@ static int fsl_qspi_prep(struct spi_nor *nor, enum spi_nor_ops ops)
struct fsl_qspi *q = nor->priv;
int ret;
+ mutex_lock(&q->lock);
ret = clk_enable(q->clk_en);
if (ret)
- return ret;
+ goto err_mutex;
ret = clk_enable(q->clk);
- if (ret) {
- clk_disable(q->clk_en);
- return ret;
- }
+ if (ret)
+ goto err_clk;
fsl_qspi_set_base_addr(q, nor);
return 0;
+
+err_clk:
+ clk_disable(q->clk_en);
+err_mutex:
+ mutex_unlock(&q->lock);
+
+ return ret;
}
static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
@@ -781,6 +789,7 @@ static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
clk_disable(q->clk);
clk_disable(q->clk_en);
+ mutex_unlock(&q->lock);
}
static int fsl_qspi_probe(struct platform_device *pdev)
@@ -864,6 +873,8 @@ static int fsl_qspi_probe(struct platform_device *pdev)
if (of_get_property(np, "fsl,qspi-has-second-chip", NULL))
q->has_second_chip = true;
+ mutex_init(&q->lock);
+
/* iterate the subnodes. */
for_each_available_child_of_node(dev->of_node, np) {
char modalias[40];
@@ -892,24 +903,24 @@ static int fsl_qspi_probe(struct platform_device *pdev)
ret = of_modalias_node(np, modalias, sizeof(modalias));
if (ret < 0)
- goto irq_failed;
+ goto mutex_failed;
ret = of_property_read_u32(np, "spi-max-frequency",
&q->clk_rate);
if (ret < 0)
- goto irq_failed;
+ goto mutex_failed;
/* set the chip address for READID */
fsl_qspi_set_base_addr(q, nor);
ret = spi_nor_scan(nor, modalias, SPI_NOR_QUAD);
if (ret)
- goto irq_failed;
+ goto mutex_failed;
ppdata.of_node = np;
ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
if (ret)
- goto irq_failed;
+ goto mutex_failed;
/* Set the correct NOR size now. */
if (q->nor_size == 0) {
@@ -950,6 +961,8 @@ last_init_failed:
i *= 2;
mtd_device_unregister(&q->mtd[i]);
}
+mutex_failed:
+ mutex_destroy(&q->lock);
irq_failed:
clk_disable_unprepare(q->clk);
clk_failed:
@@ -973,6 +986,7 @@ static int fsl_qspi_remove(struct platform_device *pdev)
writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
writel(0x0, q->iobase + QUADSPI_RSER);
+ mutex_destroy(&q->lock);
clk_unprepare(q->clk);
clk_unprepare(q->clk_en);
return 0;
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH V3] mtd: fsl-quadspi: Access multiple chips simultaneously
2015-05-20 21:52 ` Brian Norris
@ 2015-05-20 22:28 ` Han Xu
2015-05-27 19:34 ` Brian Norris
2015-06-23 23:10 ` Brian Norris
1 sibling, 1 reply; 5+ messages in thread
From: Han Xu @ 2015-05-20 22:28 UTC (permalink / raw)
To: Brian Norris
Cc: Huang Shijie, Han Xu, linux-mtd@lists.infradead.org,
han.xu@freescale.com
On Wed, May 20, 2015 at 4:52 PM, Brian Norris
<computersforpeace@gmail.com> wrote:
> Hi Han,
>
> On Wed, May 13, 2015 at 02:40:57PM -0500, Han Xu wrote:
>> Add supports for simultaneous access to multiple chips. Need to lock
>> the mutex before any quad spi operations and unlock the mutex after
>> operations complete.
>>
>> Signed-off-by: Han Xu <b45815@freescale.com>
>> ---
>> v2 -- > v3
>> 1. Unlock the mutex if errors occur.
>> 2. Destroy the mutex when module remove or probe fail.
>>
>> v1 -- > v2
>> 1. Rebase to latest l2-mtd code and resend.
>> ---
>>
>>
>> drivers/mtd/spi-nor/fsl-quadspi.c | 22 +++++++++++++++++-----
>> 1 file changed, 17 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
>> index 52a872f..e6fc064 100644
>> --- a/drivers/mtd/spi-nor/fsl-quadspi.c
>> +++ b/drivers/mtd/spi-nor/fsl-quadspi.c
> ...
>> @@ -761,13 +763,17 @@ static int fsl_qspi_prep(struct spi_nor *nor, enum spi_nor_ops ops)
>> struct fsl_qspi *q = nor->priv;
>> int ret;
>>
>> + mutex_lock(&q->lock);
>> ret = clk_enable(q->clk_en);
>> - if (ret)
>> + if (ret) {
>> + mutex_unlock(&q->lock);
>> return ret;
>> + }
>>
>> ret = clk_enable(q->clk);
>> if (ret) {
>> clk_disable(q->clk_en);
>> + mutex_unlock(&q->lock);
>> return ret;
>> }
>>
>
> I think it'd be better to have a single error path in this function now.
>
> Otherwise, I think this is OK. I can push the appended patch instead, if
> that's OK with you.
Hi Brian, I think that's fine. I will submit another patch to improve it.
>
> Signed-off-by: Han Xu <b45815@freescale.com>
> [Brian: reworked err path in fsl_qspi_prep()]
> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
> ---
> drivers/mtd/spi-nor/fsl-quadspi.c | 32 +++++++++++++++++++++++---------
> 1 file changed, 23 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
> index 52a872fa1b6e..4fe13dd535f8 100644
> --- a/drivers/mtd/spi-nor/fsl-quadspi.c
> +++ b/drivers/mtd/spi-nor/fsl-quadspi.c
> @@ -26,6 +26,7 @@
> #include <linux/mtd/mtd.h>
> #include <linux/mtd/partitions.h>
> #include <linux/mtd/spi-nor.h>
> +#include <linux/mutex.h>
>
> /* The registers */
> #define QUADSPI_MCR 0x00
> @@ -233,6 +234,7 @@ struct fsl_qspi {
> u32 clk_rate;
> unsigned int chip_base_addr; /* We may support two chips. */
> bool has_second_chip;
> + struct mutex lock;
> };
>
> static inline int is_vybrid_qspi(struct fsl_qspi *q)
> @@ -761,18 +763,24 @@ static int fsl_qspi_prep(struct spi_nor *nor, enum spi_nor_ops ops)
> struct fsl_qspi *q = nor->priv;
> int ret;
>
> + mutex_lock(&q->lock);
> ret = clk_enable(q->clk_en);
> if (ret)
> - return ret;
> + goto err_mutex;
>
> ret = clk_enable(q->clk);
> - if (ret) {
> - clk_disable(q->clk_en);
> - return ret;
> - }
> + if (ret)
> + goto err_clk;
>
> fsl_qspi_set_base_addr(q, nor);
> return 0;
> +
> +err_clk:
> + clk_disable(q->clk_en);
> +err_mutex:
> + mutex_unlock(&q->lock);
> +
> + return ret;
> }
>
> static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
> @@ -781,6 +789,7 @@ static void fsl_qspi_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
>
> clk_disable(q->clk);
> clk_disable(q->clk_en);
> + mutex_unlock(&q->lock);
> }
>
> static int fsl_qspi_probe(struct platform_device *pdev)
> @@ -864,6 +873,8 @@ static int fsl_qspi_probe(struct platform_device *pdev)
> if (of_get_property(np, "fsl,qspi-has-second-chip", NULL))
> q->has_second_chip = true;
>
> + mutex_init(&q->lock);
> +
> /* iterate the subnodes. */
> for_each_available_child_of_node(dev->of_node, np) {
> char modalias[40];
> @@ -892,24 +903,24 @@ static int fsl_qspi_probe(struct platform_device *pdev)
>
> ret = of_modalias_node(np, modalias, sizeof(modalias));
> if (ret < 0)
> - goto irq_failed;
> + goto mutex_failed;
>
> ret = of_property_read_u32(np, "spi-max-frequency",
> &q->clk_rate);
> if (ret < 0)
> - goto irq_failed;
> + goto mutex_failed;
>
> /* set the chip address for READID */
> fsl_qspi_set_base_addr(q, nor);
>
> ret = spi_nor_scan(nor, modalias, SPI_NOR_QUAD);
> if (ret)
> - goto irq_failed;
> + goto mutex_failed;
>
> ppdata.of_node = np;
> ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
> if (ret)
> - goto irq_failed;
> + goto mutex_failed;
>
> /* Set the correct NOR size now. */
> if (q->nor_size == 0) {
> @@ -950,6 +961,8 @@ last_init_failed:
> i *= 2;
> mtd_device_unregister(&q->mtd[i]);
> }
> +mutex_failed:
> + mutex_destroy(&q->lock);
> irq_failed:
> clk_disable_unprepare(q->clk);
> clk_failed:
> @@ -973,6 +986,7 @@ static int fsl_qspi_remove(struct platform_device *pdev)
> writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
> writel(0x0, q->iobase + QUADSPI_RSER);
>
> + mutex_destroy(&q->lock);
> clk_unprepare(q->clk);
> clk_unprepare(q->clk_en);
> return 0;
> --
> 1.9.1
>
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V3] mtd: fsl-quadspi: Access multiple chips simultaneously
2015-05-20 22:28 ` Han Xu
@ 2015-05-27 19:34 ` Brian Norris
0 siblings, 0 replies; 5+ messages in thread
From: Brian Norris @ 2015-05-27 19:34 UTC (permalink / raw)
To: Han Xu
Cc: Huang Shijie, Han Xu, linux-mtd@lists.infradead.org,
han.xu@freescale.com
Hi Han,
On Wed, May 20, 2015 at 05:28:20PM -0500, Han Xu wrote:
> On Wed, May 20, 2015 at 4:52 PM, Brian Norris
> <computersforpeace@gmail.com> wrote:
> > On Wed, May 13, 2015 at 02:40:57PM -0500, Han Xu wrote:
> >> --- a/drivers/mtd/spi-nor/fsl-quadspi.c
> >> +++ b/drivers/mtd/spi-nor/fsl-quadspi.c
> > ...
> >> @@ -761,13 +763,17 @@ static int fsl_qspi_prep(struct spi_nor *nor, enum spi_nor_ops ops)
> >> struct fsl_qspi *q = nor->priv;
> >> int ret;
> >>
> >> + mutex_lock(&q->lock);
> >> ret = clk_enable(q->clk_en);
> >> - if (ret)
> >> + if (ret) {
> >> + mutex_unlock(&q->lock);
> >> return ret;
> >> + }
> >>
> >> ret = clk_enable(q->clk);
> >> if (ret) {
> >> clk_disable(q->clk_en);
> >> + mutex_unlock(&q->lock);
> >> return ret;
> >> }
> >>
> >
> > I think it'd be better to have a single error path in this function now.
> >
> > Otherwise, I think this is OK. I can push the appended patch instead, if
> > that's OK with you.
>
> Hi Brian, I think that's fine. I will submit another patch to improve it.
OK. Resubmit if you'd like, or just ack my version. I'd like your
Tested-by if possible.
> >
> > Signed-off-by: Han Xu <b45815@freescale.com>
> > [Brian: reworked err path in fsl_qspi_prep()]
> > Signed-off-by: Brian Norris <computersforpeace@gmail.com>
> > ---
> > drivers/mtd/spi-nor/fsl-quadspi.c | 32 +++++++++++++++++++++++---------
> > 1 file changed, 23 insertions(+), 9 deletions(-)
[...]
Brian
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH V3] mtd: fsl-quadspi: Access multiple chips simultaneously
2015-05-20 21:52 ` Brian Norris
2015-05-20 22:28 ` Han Xu
@ 2015-06-23 23:10 ` Brian Norris
1 sibling, 0 replies; 5+ messages in thread
From: Brian Norris @ 2015-06-23 23:10 UTC (permalink / raw)
To: Han Xu; +Cc: shijie.huang, linux-mtd, han.xu
On Wed, May 20, 2015 at 02:52:50PM -0700, Brian Norris wrote:
> On Wed, May 13, 2015 at 02:40:57PM -0500, Han Xu wrote:
> I think it'd be better to have a single error path in this function now.
>
> Otherwise, I think this is OK. I can push the appended patch instead, if
> that's OK with you.
>
> Signed-off-by: Han Xu <b45815@freescale.com>
> [Brian: reworked err path in fsl_qspi_prep()]
> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
> ---
> drivers/mtd/spi-nor/fsl-quadspi.c | 32 +++++++++++++++++++++++---------
> 1 file changed, 23 insertions(+), 9 deletions(-)
...
Pushed this version to l2-mtd.git/next.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2015-05-13 19:40 [PATCH V3] mtd: fsl-quadspi: Access multiple chips simultaneously Han Xu
2015-05-20 21:52 ` Brian Norris
2015-05-20 22:28 ` Han Xu
2015-05-27 19:34 ` Brian Norris
2015-06-23 23:10 ` Brian Norris
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