From: Marek Vasut <marex@denx.de>
To: linux-mtd@lists.infradead.org
Cc: Graham Moore <grmoore@opensource.altera.com>,
Alan Tull <atull@opensource.altera.com>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
Dinh Nguyen <dinguyen@opensource.altera.com>,
Vikas MANOCHA <vikas.manocha@st.com>,
Yves Vandervennet <yvanderv@opensource.altera.com>,
devicetree@vger.kernel.org
Subject: Re: [PATCH V7 2/2] mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller.
Date: Fri, 14 Aug 2015 05:32:34 +0200 [thread overview]
Message-ID: <201508140532.34935.marex@denx.de> (raw)
In-Reply-To: <1439522892-7524-2-git-send-email-marex@denx.de>
On Friday, August 14, 2015 at 05:28:12 AM, Marek Vasut wrote:
> From: Graham Moore <grmoore@opensource.altera.com>
>
> Add support for the Cadence QSPI controller. This controller is
> present in the Altera SoCFPGA SoCs and this driver has been tested
> on the Cyclone V SoC.
>
> Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Alan Tull <atull@opensource.altera.com>
> Cc: Brian Norris <computersforpeace@gmail.com>
> Cc: David Woodhouse <dwmw2@infradead.org>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Graham Moore <grmoore@opensource.altera.com>
> Cc: Vikas MANOCHA <vikas.manocha@st.com>
> Cc: Yves Vandervennet <yvanderv@opensource.altera.com>
> Cc: devicetree@vger.kernel.org
[...]
> + /* Get flash device data */
> + for_each_available_child_of_node(dev->of_node, np) {
> + unsigned int cs;
> + struct cqspi_flash_pdata *f_pdata;
> +
> + if (of_property_read_u32(np, "reg", &cs)) {
> + dev_err(dev, "couldn't determine chip select\n");
> + return -ENXIO;
> + }
> +
> + if (cs >= CQSPI_MAX_CHIPSELECT) {
> + dev_err(dev, "chip select %d out of range\n", cs);
> + return -ENXIO;
> + }
> +
> + f_pdata = &cqspi->f_pdata[cs];
> + f_pdata->cqspi = cqspi;
> + f_pdata->cs = cs;
> +
> + ret = cqspi_of_get_flash_pdata(pdev, f_pdata, np);
> + if (ret)
> + goto probe_failed;
> +
> + nor = &f_pdata->nor;
> + mtd = &f_pdata->mtd;
> +
> + nor->mtd = mtd;
> + nor->dev = dev;
> + nor->priv = f_pdata;
> + mtd->priv = nor;
> +
> + nor->read_reg = cqspi_read_reg;
> + nor->write_reg = cqspi_write_reg;
> + nor->read = cqspi_read;
> + nor->write = cqspi_write;
> + nor->erase = cqspi_erase;
> + nor->set_protocol = cqspi_set_protocol;
> +
> + nor->prepare = cqspi_prep;
> +
--->8---
> + /*
> + * Here is a 'nasty hack' from Marek Vasut to pick
> + * up OF properties from flash device subnode.
> + */
> + nor->dev->of_node = np;
> +
> + ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD);
> + if (ret)
> + goto probe_failed;
The only bizzare thing is this stuff above ^ . If I want to pass for example
"m25p,fast-read" to the SPI NOR connected to this controller, I have to set
up the nor->dev->of_node, otherwise the of_node would point to the controller.
I am positive this is wrong, but I'm not quite sure how to repair this.
Brian, can you please comment on this one bit ?
[...]
next prev parent reply other threads:[~2015-08-14 3:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-14 3:28 [PATCH V7 1/2] mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driver Marek Vasut
2015-08-14 3:28 ` [PATCH V7 2/2] mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller Marek Vasut
2015-08-14 3:32 ` Marek Vasut [this message]
2015-08-18 2:47 ` Brian Norris
2015-08-21 5:32 ` Marek Vasut
2015-08-18 2:34 ` vikas
2015-08-18 19:17 ` Graham Moore
2015-08-18 20:35 ` vikas
2015-08-21 4:04 ` Marek Vasut
2015-08-21 7:09 ` Vikas MANOCHA
2015-08-18 2:35 ` [PATCH V7 1/2] mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driver vikas
2015-08-18 4:47 ` Marek Vasut
2015-08-18 5:48 ` Vikas MANOCHA
2015-08-18 19:03 ` Graham Moore
2015-08-18 20:18 ` vikas
2015-08-20 4:03 ` Marek Vasut
2015-08-20 16:06 ` vikas
2015-08-21 3:46 ` Marek Vasut
2015-08-21 7:00 ` Vikas MANOCHA
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