From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a6L6V-0001IJ-A8 for linux-mtd@lists.infradead.org; Tue, 08 Dec 2015 16:27:04 +0000 Date: Tue, 8 Dec 2015 17:26:41 +0100 From: Boris Brezillon To: Harvey Hunt Cc: , Zubair Lutfullah Kakakhel , , Alex Smith , Brian Norris , "David Woodhouse" Subject: Re: [PATCH v9 2/3] mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs Message-ID: <20151208172641.4e1f935a@bbrezillon> In-Reply-To: <5666FF6B.5090309@imgtec.com> References: <1449144142-24004-1-git-send-email-harvey.hunt@imgtec.com> <1449144142-24004-3-git-send-email-harvey.hunt@imgtec.com> <20151208151436.11ce72f4@bbrezillon> <5666FF6B.5090309@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, 8 Dec 2015 16:03:55 +0000 Harvey Hunt wrote: > > > > static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, > > unsigned int ctrl) > > { > > struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd); > > struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller); > > struct jz4780_nand_cs *cs; > > > > if (WARN_ON(nfc->selected < 0)) > > return; > > > > cs = &nfc->cs[nfc->selected]; > > > > if (ctrl & NAND_CTRL_CHANGE) { > > if (cmd != NAND_CMD_NONE) { > > if (ctrl & NAND_ALE) > > writeb(cmd, cs->base + OFFSET_ADDR); > > else if (ctrl & NAND_CLE) > > writeb(cmd, cs->base + OFFSET_CMD); > > } > > > > jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE); > > } > > } > > > > Okay, I understand your point now. I would also have to implement the > read/write functions to replace the defaults, correct? If so, it feels > strange to add functions to reimplement the default ones. > Actually it should be something like this, because NAND_CTRL_CHANGE is cleared after the first address cycle. static void jz4780_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct jz4780_nand_chip *nand = to_jz4780_nand_chip(mtd); struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(nand->chip.controller); struct jz4780_nand_cs *cs; if (WARN_ON(nfc->selected < 0)) return; cs = &nfc->cs[nfc->selected]; jz4780_nemc_assert(nfc->dev, cs->bank, ctrl & NAND_NCE); if (cmd == NAND_CMD_NONE) return; if (ctrl & NAND_ALE) writeb(cmd, cs->base + OFFSET_ADDR); else if (ctrl & NAND_CLE) writeb(cmd, cs->base + OFFSET_CMD); } -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com