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Date: Sat, 23 Jan 2016 13:11:52 -0800
From: Brian Norris <computersforpeace@gmail.com>
To: Yuan Yao <yao.yuan@freescale.com>
Cc: dwmw2@infradead.org, han.xu@freescale.com, linux-kernel@vger.kernel.org,
 linux-mtd@lists.infradead.org, yao.yuan@nxp.com
Subject: Re: [PATCH v3 1/3] mtd: spi-nor: fsl-quadspi: add big-endian support
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On Thu, Jan 21, 2016 at 03:53:54PM +0800, Yuan Yao wrote:
> Add R/W functions for big- or little-endian registers:
> The qSPI controller's endian is independent of the CPU core's endian.
> So far, the qSPI have two versions for big-endian and little-endian.
> 
> Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
> Acked-by: Han xu <han.xu@freescale.com>
> ---

...

> @@ -954,6 +990,7 @@ static int fsl_qspi_probe(struct platform_device *pdev)
>  	if (IS_ERR(q->iobase))
>  		return PTR_ERR(q->iobase);
>  
> +	q->big_endian = of_property_read_bool(np, "big-endian");
>  	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
>  					"QuadSPI-memory");
>  	if (!devm_request_mem_region(dev, res->start, resource_size(res),

Still no documentation for this property?? You're trying my patience.
We've had the same request since November, and you haven't managed to
satisfy it.