From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Jorge Ramirez <jorge.ramirez-ortiz@linaro.org>
Cc: computersforpeace@gmail.com, dwmw2@infradead.org,
matthias.bgg@gmail.com, robh@kernel.org,
linux-mtd@lists.infradead.org, xiaolei.li@mediatek.com,
linux-mediatek@lists.infradead.org, erin.lo@mediatek.com,
daniel.thompson@linaro.org, blogic@openwrt.org
Subject: Re: [PATCH v4 2/2] mtd: mediatek: driver for MTK Smart Device Gen1 NAND
Date: Tue, 10 May 2016 16:55:17 +0200 [thread overview]
Message-ID: <20160510165517.69a17aeb@bbrezillon> (raw)
In-Reply-To: <5731F22C.902@linaro.org>
On Tue, 10 May 2016 10:37:32 -0400
Jorge Ramirez <jorge.ramirez-ortiz@linaro.org> wrote:
> On 05/10/2016 08:13 AM, Boris Brezillon wrote:
> >> +#define ECC_IDLE_REG(x) ((x) == ECC_ENC ? ECC_ENCIDLE : ECC_DECIDLE)
> >> >+#define ECC_IDLE_MASK(x) ((x) == ECC_ENC ? ENC_IDLE : DEC_IDLE)
> > No need for this macro, it's always bit0, so just define an ECC_IDLE
> > macro and use it for both decoder and encoder.
>
> this was only done for consistency to help people reading the code (same
> for codec_enable, codec_disable).
> I suppose I could remove macros and just write 0 and 1 to the registers
> if you prefer that.
No.
>
> >
> > There seems to be some kind of pattern in your ENC/DEC registers.
> > ENC registers start at 0 and DEC ones at 0x100.
> > CNF register is always at 0x4 + mode/dir_offset (ie 0x100 for DEC and
> > 0x0 for ENC), ...
> > Maybe you should define common macros for those registers, and choose
> > the base offset depending on the mode you're operating in (encoding or
> > decoding).
>
> Not sure if you are familiar with George Lakoff and his book "Don't
> Think Of An Elephant! Know Your Values And Frame The Debate" but the key
> message is not to engage in a discussion when you disagree with the
> terms used by your counterpart since you wont be able to frame the
> argument (the book is actually very interesting if politics and and the
> political debate is something that interest you)
>
> I explicitly chose not to talk about modes, instead I chose the engine
> driver to talk about the codecs it controls; for me mode is a higher
> level concept that I didn't have a need for since in this case the mode
> is a 1-1 relationship to the codec. So when you tell me about the mode
> the engine is operating in I'd rather say the codec that the ecc engine
> is accessing. I hope it makes sense.
I'm not arguing about the use of codec, but IMO codec is just
representing a device that is capable of encoding/decoding stuff, it
does not represent in which mode you want to use this device.
>
> if you want to talk about modes instead of the encoders and decoders
> that is fine since you are the maintainer.
No, the terms encoders/decoders are fine, I was just suggesting to
share some of the definitions between the encoder and decoder parts.
> I can rewrite the relevant parts of the driver but I honestly see no value.
No that's fine.
>
> why did I wrote these macros? just for readability since they are simple
> conditionals.
Again, I'm not arguing against the definition of helper macros, just
suggesting another way to do it to avoid register offset duplication.
> So coming back to your second question, I not sure why I would use a
> base offset when I already have the map. I wouldn't.
Anyway, let's keep it like this.
>
> >
> >> >+#define ECC_IRQ_REG(x) ((x) == ECC_ENC ? ECC_ENCIRQ_EN : ECC_DECIRQ_EN)
> >> >+#define ECC_IRQ_EN(x) ((x) == ECC_ENC ? ENC_IRQEN : DEC_IRQEN)
> >> >+#define ECC_CTL_REG(x) ((x) == ECC_ENC ? ECC_ENCCON : ECC_DECCON)
> >> >+#define ECC_CODEC_ENABLE(x) ((x) == ECC_ENC ? ENC_EN : DEC_EN)
> >> >+#define ECC_CODEC_DISABLE(x) ((x) == ECC_ENC ? ENC_DE : DEC_DE)
>
>
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-05-10 14:55 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-29 16:17 [PATCH v4 0/2] MTK Smart Device Gen1 NAND Driver Jorge Ramirez-Ortiz
2016-04-29 16:17 ` [PATCH v4 1/2] mtd: mediatek: device tree docs for MTK Smart Device Gen1 NAND Jorge Ramirez-Ortiz
2016-05-06 13:38 ` Boris Brezillon
2016-05-10 11:57 ` Jorge Ramirez
2016-05-10 12:22 ` Boris Brezillon
2016-04-29 16:17 ` [PATCH v4 2/2] mtd: mediatek: driver " Jorge Ramirez-Ortiz
2016-05-01 7:32 ` John Crispin
[not found] ` <1462165406.8414.196.camel@mhfsdcap03>
2016-05-02 6:13 ` John Crispin
2016-05-02 11:38 ` Jorge Ramirez
2016-05-02 17:43 ` John Crispin
2016-05-10 12:13 ` Boris Brezillon
2016-05-10 14:37 ` Jorge Ramirez
2016-05-10 14:55 ` Boris Brezillon [this message]
2016-05-10 14:45 ` Jorge Ramirez
2016-05-10 14:59 ` Boris Brezillon
2016-05-10 15:18 ` Jorge Ramirez
2016-05-10 14:50 ` Jorge Ramirez
2016-05-10 15:13 ` Boris Brezillon
2016-05-10 15:37 ` Jorge Ramirez
2016-05-10 14:53 ` Jorge Ramirez
2016-05-10 18:14 ` Jorge Ramirez
2016-05-10 18:19 ` Boris Brezillon
2016-05-10 14:53 ` Jorge Ramirez
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