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From: Mark Brown <broonie@kernel.org>
To: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: linux-spi@vger.kernel.org,
	MTD Maling List <linux-mtd@lists.infradead.org>,
	vigneshr@ti.com, Florian Fainelli <f.fainelli@gmail.com>,
	"Jayachandran C <jchandra@broadcom.com>,
	bcm-kernel-feedback-list" <bcm-kernel-feedback-list@broadcom.com>,
	Vikram Prakash <vikram.prakash@broadcom.com>,
	Andy Fung <andy.fung@broadcom.com>,
	Jon Mason <jon.mason@broadcom.com>,
	"Jayachandran C <jchandra@broadcom.com>,
	bcm-kernel-feedback-list" <jchandra@broadcom.com>
Subject: Re: [PATCH v5 8/8] spi: nsp-qspi: Add Broadcom NSP, NS2, Cygnus SoC support
Date: Fri, 19 Aug 2016 17:42:34 +0100	[thread overview]
Message-ID: <20160819164234.GC22076@sirena.org.uk> (raw)
In-Reply-To: <CAC=U0a31LOphD=21-tBtiCxN-JqxSArxqhQ4_=fXwH-vEKnbHA@mail.gmail.com>

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On Fri, Aug 19, 2016 at 11:43:24AM -0400, Kamal Dasu wrote:
> On Tue, Aug 16, 2016 at 2:40 PM, Mark Brown <broonie@kernel.org> wrote:

> > I am confused why we are parsing the interrupt-names property here?

> For Muxed L1 single source interrupt, there is only one irq, and  SoCs
> could use a different different name wanted to use that name. But I
> could force a name as well.

Either don't use names or force a name, trying to mix the two is just
messy.

> >> +     /*
> >> +      * Some SoCs integrate spi controller (e.g., its interrupt bits)
> >> +      * in specific ways
> >> +      */
> >> +     if (soc) {
> >> +             qspi->soc = soc;
> >> +             soc->bcm_qspi_int_set(soc, MSPI_DONE, true);
> >> +     } else {
> >> +             qspi->soc = NULL;
> >> +     }

> > The variable name "soc" here doesn't seem hugely descriptive when it's
> > just for the interrupt controller.

> Named it that way since it could potentially have other SoC specific
> settings for spi master bus needed in future.

But then that'll break this code - if it's going to be a feature flag
bitmask or something like that it should have an appropriate name and be
used in a way that reflects this.

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      reply	other threads:[~2016-08-19 16:43 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-29 22:13 [PATCH v5 0/8] Broadcom stb, nsp, ns2, cygnus QSPI driver Kamal Dasu
2016-07-29 22:13 ` [PATCH v5 1/8] Documentation: dt: spi: Add BRCMSTB SoC bindings Kamal Dasu
2016-08-04 21:06   ` Mark Brown
2016-08-04 22:20     ` Florian Fainelli
2016-08-05 11:03       ` Mark Brown
2016-08-16 18:19   ` Mark Brown
2016-08-19 15:07     ` Kamal Dasu
2016-07-29 22:13 ` [PATCH v5 2/8] spi: bcm-qspi: Add Broadcom MSPI driver Kamal Dasu
2016-08-16 18:15   ` Mark Brown
2016-08-19 15:20     ` Kamal Dasu
2016-07-29 22:13 ` [PATCH v5 3/8] spi: bcm-qspi: Add BSPI spi-nor flash controller driver Kamal Dasu
2016-08-16 18:31   ` Mark Brown
2016-08-19 15:33     ` Kamal Dasu
2016-07-29 22:13 ` [PATCH v5 4/8] mtd: m25p80: Let m25p80_read() fallback to spi transfer Kamal Dasu
2016-08-04 21:07   ` Mark Brown
2016-08-19 14:59     ` Kamal Dasu
2016-07-29 22:13 ` [PATCH v5 5/8] Documentation: dt: spi: Add Broadcom NSP, NS2 SoC bindings Kamal Dasu
2016-08-16 18:32   ` Mark Brown
2016-07-29 22:13 ` [PATCH v5 6/8] arm: dts: Add bcm-nsp and bcm958625k support Kamal Dasu
2016-08-01 15:09   ` Jonas Gorski
2016-08-02 19:51     ` Kamal Dasu
2016-07-29 22:13 ` [PATCH v5 7/8] arm64: dts: Add ns2 SoC support Kamal Dasu
2016-07-29 22:13 ` [PATCH v5 8/8] spi: nsp-qspi: Add Broadcom NSP, NS2, Cygnus " Kamal Dasu
2016-08-16 18:40   ` Mark Brown
2016-08-19 15:43     ` Kamal Dasu
2016-08-19 16:42       ` Mark Brown [this message]

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