[PATCH v3 0/2] mtd: spi-nor: Add possibility to disable chip erase

[PATCH v3 0/2] mtd: spi-nor: Add possibility to disable chip erase

[Marcin Krzeminski]

v3:
* Fix/reword commit messages.
v2:
* Rebased to git://github.com/spi-nor/linux.git

Marcin Krzeminski (2):
  mtd: spi-nor: Fix whole chip erasing for stacked chips.
  mtd: spi-nor: Disable chip erase for Micron n25q00.

 drivers/mtd/spi-nor/spi-nor.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

-- 
2.9.3

[PATCH v3 1/2] mtd: spi-nor: Fix whole chip erasing for stacked chips.

[Marcin Krzeminski]

Curretly it is possible to disable chip erase for spi-nor driver.
Some modern stacked (multi die) flash chips does not support chip
erase opcode at all but spi-nor framework need to cope with them too.
This commit extend exising functionality to allow disable
chip erase for a single flash chip.

Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 15fb8af..b6656b2 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -81,6 +81,7 @@ struct flash_info {
 					 * because it has the same value as
 					 * ATMEL flashes)
 					*/
+#define NO_CHIP_ERASE	BIT(10) /* Chip does not support chip erase */
 };
 
 #define JEDEC_MFR(info)	((info)->id[0])
@@ -1545,6 +1546,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
 		nor->flags |= SNOR_F_USE_FSR;
 	if (info->flags & SPI_NOR_HAS_TB)
 		nor->flags |= SNOR_F_HAS_SR_TB;
+	if (info->flags & NO_CHIP_ERASE)
+		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
 
 #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
 	/* prefer "small sector" erase if possible */
-- 
2.9.3

[PATCH v3 1/2] mtd: spi-nor: Fix whole chip erasing in stacked chips.

[Marcin Krzeminski]

Curretly it is possible to disable chip erase for spi-nor driver.
Some modern stacked (multi die) flash chips does not support chip
erase opcode at all but spi-nor framework need to cope with them too.
This commit extend exising functionality to allow disable
chip erase for a single flash chip.

Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 15fb8af..b6656b2 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -81,6 +81,7 @@ struct flash_info {
 					 * because it has the same value as
 					 * ATMEL flashes)
 					*/
+#define NO_CHIP_ERASE	BIT(10) /* Chip does not support chip erase */
 };
 
 #define JEDEC_MFR(info)	((info)->id[0])
@@ -1545,6 +1546,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
 		nor->flags |= SNOR_F_USE_FSR;
 	if (info->flags & SPI_NOR_HAS_TB)
 		nor->flags |= SNOR_F_HAS_SR_TB;
+	if (info->flags & NO_CHIP_ERASE)
+		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
 
 #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
 	/* prefer "small sector" erase if possible */
-- 
2.9.3

[PATCH v3 2/2] mtd: spi-nor: Disable chip erase for Micron n25q00.

[Marcin Krzeminski]

Micron n25q00 are stacked chips, thus do not support chip erase.
>From now spi-nor framework will not send chip erase command,
instead use sector at time erase procedure.

Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index b6656b2..3b416d6 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -950,8 +950,8 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
-	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
-	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
-- 
2.9.3

Re: [PATCH v3 1/2] mtd: spi-nor: Fix whole chip erasing in stacked chips.

[mar.krzeminski]

Please ingore this one. Sorry!

W dniu 06.01.2017 o 14:03, Marcin Krzeminski pisze:
> Curretly it is possible to disable chip erase for spi-nor driver.
> Some modern stacked (multi die) flash chips does not support chip
> erase opcode at all but spi-nor framework need to cope with them too.
> This commit extend exising functionality to allow disable
> chip erase for a single flash chip.
>
> Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
> ---
>   drivers/mtd/spi-nor/spi-nor.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 15fb8af..b6656b2 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -81,6 +81,7 @@ struct flash_info {
>   					 * because it has the same value as
>   					 * ATMEL flashes)
>   					*/
> +#define NO_CHIP_ERASE	BIT(10) /* Chip does not support chip erase */
>   };
>   
>   #define JEDEC_MFR(info)	((info)->id[0])
> @@ -1545,6 +1546,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
>   		nor->flags |= SNOR_F_USE_FSR;
>   	if (info->flags & SPI_NOR_HAS_TB)
>   		nor->flags |= SNOR_F_HAS_SR_TB;
> +	if (info->flags & NO_CHIP_ERASE)
> +		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
>   
>   #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
>   	/* prefer "small sector" erase if possible */

Re: [PATCH v3 1/2] mtd: spi-nor: Fix whole chip erasing for stacked chips.

[Cyrille Pitchen]

Hi Marcin,

You have many typos in your commit message:

Le 06/01/2017 à 14:03, Marcin Krzeminski a écrit :
> Curretly it is possible to disable chip erase for spi-nor driver.
Currently
> Some modern stacked (multi die) flash chips does not support chip
do not support
> erase opcode at all but spi-nor framework need to cope with them too.
needs to
> This commit extend exising functionality to allow disable
extends existing
> chip erase for a single flash chip.
> 
> Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 15fb8af..b6656b2 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -81,6 +81,7 @@ struct flash_info {
>  					 * because it has the same value as
>  					 * ATMEL flashes)
>  					*/
> +#define NO_CHIP_ERASE	BIT(10) /* Chip does not support chip erase */
>  };
>

Sorry but since yesterday, this can't apply to the github spi-nor tree:
I've merged the "mtd: spi-nor: add a stateless method to support memory
size above 128Mib" patch, which already defines a new macro with the
BIT(10) value.

>  #define JEDEC_MFR(info)	((info)->id[0])
> @@ -1545,6 +1546,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
>  		nor->flags |= SNOR_F_USE_FSR;
>  	if (info->flags & SPI_NOR_HAS_TB)
>  		nor->flags |= SNOR_F_HAS_SR_TB;
> +	if (info->flags & NO_CHIP_ERASE)
> +		nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
>  
>  #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
>  	/* prefer "small sector" erase if possible */
> 

Best regards,

Cyrille