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Date: Wed, 29 Mar 2017 09:03:40 +0200
From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: <yamada.masahiro@socionext.com>
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Subject: Re: [RESEND PATCH v2 50/53] mtd: nand: allocate aligned buffers if
 NAND_OWN_BUFFERS is unset
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On Wed, 29 Mar 2017 03:22:01 +0000
<yamada.masahiro@socionext.com> wrote:

> Hi Boris
> 
> > -----Original Message-----  
> > > The current situation violates [A].  
> > 
> > Do you have a real failure that is proven to be caused by mis cache
> > line alignment, or are you just speculating?  
> 
> No real problem.
> Rather, I am following the line 226 of DMA-API.txt
> "Warnings: Memory coherency ...".
> 
> 
> In my case, the cache line is 64 byte (for ARM),
> But this does not really matter for the reason
> nand_buffers is only touched at initialization as you mentioned.
> 
> 
> [B] is a real problem for me
> because Denali DMA engine requires >4byte alignment.
> 
> 
> 
> 
> So, I can replace the git-log in the next version:
> 
> "
> Some NAND controllers are using DMA engine requiring a specific buffer
> alignment. The core provides no guarantee on the nand_buffers pointers,
> which forces some drivers to allocate their own buffers and pass the
> NAND_OWN_BUFFERS flag.
> 
> Rework the nand_buffers allocation logic to allocate each buffer
> independently. This should make most NAND controllers/DMA engine
> happy, and allow us to get rid of these custom buf allocation in NAND
> controller drivers.
> "

Yep, sounds better to me.

Thanks,

Boris