Re: [RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings

Rob Herring
2017-04-03T13:30:01Z

On Mon, Mar 27, 2017 at 06:05:23PM +0200, Jan Glauber wrote:
> Add device tree binding description for Cavium SOC nand flash controller.
>
> CC: Rob Herring <robh+dt@kernel.org>
> CC: Mark Rutland <mark.rutland@arm.com>
> CC: devicetree@vger.kernel.org
>
> Signed-off-by: Jan Glauber <jglauber@cavium.com>
> ---
> .../devicetree/bindings/mtd/cavium_nand.txt | 32 ++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/cavium_nand.txt
>
> diff --git a/Documentation/devicetree/bindings/mtd/cavium_nand.txt b/Documentation/devicetree/bindings/mtd/cavium_nand.txt
> new file mode 100644
> index 0000000..4698d1f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/cavium_nand.txt
> @@ -0,0 +1,32 @@
> +* Cavium NAND controller
> +
> +Required properties:
> +
> +- compatible: should be "cavium,cn8xxx-nand"

Don't use wildcards in compatible strings. For PCI devices, this should
be based on the PCI vendor and device IDs.

> +- reg: PCI devfn
> +- clocks: must contain system clock
> +- #address-cells: <1>
> +- #size-cells: <0>
> +
> +The nand flash controller may contain up to 8 subnodes representing
> +NAND flash chips. Their properties are as follows.
> +
> +Required properties:
> +- compatible: should be "cavium,nandcs"
> +- reg: a single integer representing the chip-select number
> +- nand-ecc-mode: see nand.txt
> +
> +Example:
> +
> +nfc: nand@b,0 {
> + compatible = "cavium,cn8xxx-nand";
> + reg = <0x5800 0 0 0 0>;
> + clocks = <&sclk>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + nand@1 {
> + compatible = "cavium,nandcs";
> + reg = <1>;
> + nand-ecc-mode = "on-die";
> +};
> --
> 2.9.0.rc0.21.g7777322
>