From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vignesh R To: Marek Vasut , Cyrille Pitchen , Rob Herring CC: David Woodhouse , Brian Norris , Boris Brezillon , Richard Weinberger , , , , Vignesh R , linux-arm-kernel Subject: [PATCH v2 5/5] mtd: spi-nor: cadence-quadspi: Add runtime PM support Date: Wed, 16 Aug 2017 10:20:53 +0530 Message-ID: <20170816045053.15492-6-vigneshr@ti.com> In-Reply-To: <20170816045053.15492-1-vigneshr@ti.com> References: <20170816045053.15492-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Type: text/plain List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Add pm_runtime* calls to cadence-quadspi driver. This is required to switch on QSPI power domain on TI 66AK2G SoC during probe. Signed-off-by: Vignesh R --- drivers/mtd/spi-nor/cadence-quadspi.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index c11ced529ddd..4fd6fb9c83b3 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -1224,6 +1225,13 @@ static int cqspi_probe(struct platform_device *pdev) return -ENXIO; } + pm_runtime_enable(&pdev->dev); + ret = pm_runtime_get_sync(&pdev->dev); + if (ret < 0) { + pm_runtime_put_noidle(&pdev->dev); + return ret; + } + ret = clk_prepare_enable(cqspi->clk); if (ret) { dev_err(dev, "Cannot enable QSPI clock.\n"); @@ -1275,6 +1283,9 @@ static int cqspi_remove(struct platform_device *pdev) clk_disable_unprepare(cqspi->clk); + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + return 0; } -- 2.14.1