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From: Brian Norris <computersforpeace@gmail.com>
To: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Richard Weinberger <richard@nod.at>,
	linux-mtd@lists.infradead.org,
	Nicolas Ferre <nicolas.ferre@atmel.com>,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Marek Vasut <marek.vasut@gmail.com>,
	Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Subject: Re: [PATCH] mtd: nand: atmel: Relax tADL_min constraint
Date: Thu, 24 Aug 2017 21:09:13 -0700	[thread overview]
Message-ID: <20170825040913.GA68252@google.com> (raw)
In-Reply-To: <20170823184501.7665-1-boris.brezillon@free-electrons.com>

Hi,

On Wed, Aug 23, 2017 at 08:45:01PM +0200, Boris Brezillon wrote:
> Version 4 of the ONFI spec mandates that tADL be at least 400 nanoseconds,
> but, depending on the master clock rate, 400 ns may not fit in the tADL
> field of the SMC reg. We need to relax the check and accept the -ERANGE
> return code.
> 
> Note that previous versions of the ONFI spec had a lower tADL_min (100 or
> 200 ns). It's not clear why this timing constraint got increased but it
> seems most NANDs are fine with values lower than 400ns, so we should be
> safe.
> 
> Fixes: f9ce2eddf176 ("mtd: nand: atmel: Add ->setup_data_interface() hooks")
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
>  drivers/mtd/nand/atmel/nand-controller.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/atmel/nand-controller.c b/drivers/mtd/nand/atmel/nand-controller.c
> index 2c8baa0c2c4e..ceec21bd30c4 100644
> --- a/drivers/mtd/nand/atmel/nand-controller.c
> +++ b/drivers/mtd/nand/atmel/nand-controller.c
> @@ -1364,7 +1364,18 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
>  	ret = atmel_smc_cs_conf_set_timing(smcconf,
>  					   ATMEL_HSMC_TIMINGS_TADL_SHIFT,
>  					   ncycles);
> -	if (ret)
> +	/*
> +	 * Version 4 of the ONFI spec mandates that tADL be at least 400
> +	 * nanoseconds, but, depending on the master clock rate, 400 ns may not
> +	 * fit in the tADL field of the SMC reg. We need to relax the check and
> +	 * accept the -ERANGE return code.
> +	 *
> +	 * Note that previous versions of the ONFI spec had a lower tADL_min
> +	 * (100 or 200 ns). It's not clear why this timing constraint got
> +	 * increased but it seems most NANDs are fine with values lower than
> +	 * 400ns, so we should be safe.
> +	 */
> +	if (ret && ret != -ERANGE)
>  		return ret;

So I take it you're fine with falling back to this case, where you just
get the "max" (and "max" is not quite 400ns)?

        /*
         * Let's just put the maximum we can if the requested setting does
         * not fit in the register field.
         * We still return -ERANGE in case the caller cares.
         */

Could be nice if there was some kind of sanity check still (e.g., don't
allow 1ns when we requested 1000ns), but I'm not sure what that would
be.

Unless I hear screaming, I'll queue this up and send it out within a
day.

Brian

>  	ncycles = DIV_ROUND_UP(conf->timings.sdr.tAR_min, mckperiodps);
> -- 
> 2.11.0
> 

  parent reply	other threads:[~2017-08-25  4:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-23 18:45 [PATCH] mtd: nand: atmel: Relax tADL_min constraint Boris Brezillon
2017-08-24  8:42 ` Quentin Schulz
2017-08-25  4:09 ` Brian Norris [this message]
2017-08-25  6:23   ` Boris Brezillon
2017-08-25 21:34     ` Brian Norris

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