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Date: Fri, 10 Nov 2017 10:48:50 -0800
From: Tony Lindgren <tony@atomide.com>
To: Ladislav Michl <ladis@linux-mips.org>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>, linux-mtd@lists.infradead.org,
 linux-omap@vger.kernel.org, Roger Quadros <rogerq@ti.com>,
 Boris Brezillon <boris.brezillon@free-electrons.com>,
 Kyungmin Park <kyungmin.park@samsung.com>
Subject: Re: [PATCH v3 5/7] mtd: onenand: omap2: Unify OMAP2 and OMAP3 DMA
 implementation
Message-ID: <20171110184850.GT28152@atomide.com>
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* Ladislav Michl <ladis@linux-mips.org> [171110 18:28]:
> On Fri, Nov 10, 2017 at 07:24:23AM -0800, Tony Lindgren wrote:
> > FYI, the gpio pin for onenand should not be in gpio mode. It should
> > be used as external dma request line to automatically trigger new
> > transfers like we do for tusb6010 dma. But of course it's possible
> > that onenand has other issues too preventing the dma usage.
> 
> Hmm, that's probably what comment in omap3-n900.dts is saying:
> "sys_ndmareq1 could be used by the driver, not as gpio65 though"
> However board-rx51 (is that n900?) is using it as gpio pin.
> Also omap2420-n8x0-common.dtsi comment says: "gpio-irq for dma: 26"
> and it matches board-n8x0.c platform data configuration.
> But I still missing pinmux configuration as we need to add it into
> DT as well. I guess this was originally done in bootloader. Any hint
> where can I get this info from?

Well I have a utility called padconftodts that uses the old kernel
pinmux data :) I'll try to update a bit and push out over next few days.
It can read the /sys/kernel/debug/pinctrl data and convert it to a
dts file with some nice comments.

So I should be able to also dump out the pins for n8x0 and n900.

Regards,

Tony