Re: [BUG] pxa3xx: wait time out when scanning for bb

[Miquel RAYNAL <miquel.raynal@free-electrons.com>]

Hi Sean,

> > As you may know, I am actively working on a new interface in the
> > NAND core called ->exec_op() (see [1] and [2]) and the first driver
> > to implement this interface is a rework of pxa3xx_nand.c renamed
> > marvell_nand.c (see [3]).
> >
> > May I suggest you to test these changes and report me if it fails? I
> > prepared a branch ready to be tested (just add your own device
> > tree), available on my Github at [4].
> >
> > If you have failures, it would be great to enable dynamic debug in
> > the core (put #define DEBUG before all #includes in
> > drivers/mtd/nand/nand_core.c) and report on the mailing list what
> > you get. Otherwise, you may stack this commits on top of your
> > branch, or wait for 4.16 to be released (hopefully).
> >
> > Thanks,
> > Miquèl
> >
> > [1] https://www.spinics.net/lists/arm-kernel/msg619633.html
> > [2]
> > http://lists.infradead.org/pipermail/linux-mtd/2017-December/077965.html
> > [3]
> > http://lists.infradead.org/pipermail/linux-mtd/2017-December/077973.html
> > [4]
> > https://github.com/miquelraynal/linux/tree/marvell/nand-next/nfc-rework 
> Thanks I didn't know about that :-)
> 
> I had a look at it and I have rebased my stuff on top of your branch.
> I have edited my devicetree to look like this:
> &nand_controller {
>      status = "okay";
>      pinctrl-names = "default";
>      pinctrl-0 = <&nand_pins>, <&nand_rb>;
> 
>      nand@0 {
>          reg = <0>;
>          label = "pxa3xx_nand-0";
>          marvell,rb = <0>;
>          marvell,nand-keep-config;
>          nand-on-flash-bbt;
>          nand-ecc-strength = <4>;
>          nand-ecc-step-size = <512>;
>      };
> };
> 
> It produces a lot of bad eraseblocks entrys
> [    2.693343] nand: device found, Manufacturer ID: 0x2c, Chip ID:
> 0xda [    2.699717] nand: Micron MT29F2G08ABAEAH4
> [    2.703772] nand: 256 MiB, SLC, erase size: 128 KiB, page size:
> 2048, OOB size: 64
> [    2.714286] Bad block table not found for chip 0
> [    2.721509] Bad block table not found for chip 0
> [    2.726139] Scanning device for bad blocks
> [    2.730583] Bad eraseblock 0 at 0x000000000000
> [    2.735365] Bad eraseblock 1 at 0x000000020000
> [    2.740145] Bad eraseblock 2 at 0x000000040000
> [    2.744934] Bad eraseblock 3 at 0x000000060000
> [    2.749714] Bad eraseblock 4 at 0x000000080000
> 
> Is my devicetree correct?

It depends:
  - Did you already use bad block tables before ?
  - Is your bootloader using 4b/512B ECC strength ?

Besides:

  - What filesystem are you booting? Is it UBIFS or JFFS2 or
something else?
  - Did you show the 5 first bad eraseblocks only or all of them?
  - Do you have good blocks ?
  - Can you make use of the NAND chip after?

Thanks,
Miquèl