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Date: Mon, 11 Dec 2017 17:41:59 +0100
From: Miquel RAYNAL <miquel.raynal@free-electrons.com>
To: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
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Subject: Re: [BUG] pxa3xx: wait time out when scanning for bb
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On Mon, 11 Dec 2017 13:08:23 -0300
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> wrote:

> On 11 December 2017 at 10:13, Miquel RAYNAL
> <miquel.raynal@free-electrons.com> wrote:
> > On Mon, 11 Dec 2017 09:30:53 -0300
> > Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> wrote:
> > =20
> >> On 10 December 2017 at 11:17, Miquel RAYNAL
> >> <miquel.raynal@free-electrons.com> wrote: =20
> >> > Hi Ezequiel,
> >> > =20
> >> >> >> [    2.296924] nand: device found, Manufacturer ID: 0x2c,
> >> >> >> Chip ID: 0xda [    2.303311] nand: Micron MT29F2G08ABAEAH4
> >> >> >> [    2.307334] nand: 256 MiB, SLC, erase size: 128 KiB, page
> >> >> >> size: 2048, OOB size: 64
> >> >> >> [    2.314939] pxa3xx-nand f10d0000.flash: ECC strength 16,
> >> >> >> ECC step size 2048 =20
> >> >> >
> >> >> > In theory, Marvell NAND flash controller does support 16-bit
> >> >> > strength per 512 bytes over 2048 bytes pages. However, this
> >> >> > controller driver (pxa3xx_nand) does not. See [1] for the
> >> >> > supported configurations. =20
> >> >>
> >> >> Why do you say the driver does not support it? =20
> >> >
> >> > My reading of the trace was incomplete as it is mentioned that
> >> > the 16-bit correction applies on 2kiB chunks (a full page) while
> >> > I was referring to 512 bytes chunks.
> >> >
> >> > Protecting 2kiB pages with BCH algorithm may prevent the flip of
> >> > up to 16 bits per page, which may also be seen as 4 bits per 512
> >> > bytes. Asking for 16-bit strength for 512 bytes (configuration I
> >> > was referring to) is supported by the controller but simply not
> >> > implemented.
> >> >
> >> > However, below code setting up ecc->strength to 16 while
> >> > ecc_stepsize is 512 is, IMHO, wrong.
> >> > =20
> >>
> >> If you feel there's anything wrong and worth changing in the
> >> current driver, please submit a patch. =20
> >
> > Somehow I did it last week, by sending the first version of a
> > rework :)=20
>=20
> Sure, and I'm happy to see the rework.

Thanks!

>=20
> However, this driver will still be around, possibly for many years
> given vendors using stable kernels.

That's right. I won't hesitate to send patches for stable kernels.

Cheers,
Miqu=C3=A8l