From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Frieder Schrempf <frieder.schrempf@exceet.de>
Cc: "Peter Pan" <peterpansjtu@gmail.com>,
"Peter Pan 潘栋 (peterpandong)" <peterpandong@micron.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Subject: Re: [PATCH v6 00/15] A SPI NAND framework under generic NAND framework
Date: Thu, 21 Dec 2017 14:01:22 +0100 [thread overview]
Message-ID: <20171221140122.001bd196@bbrezillon> (raw)
In-Reply-To: <a06312e4-a7e6-8b7b-9eb5-8320302dcc55@exceet.de>
Hi Frieder,
On Thu, 21 Dec 2017 12:48:16 +0100
Frieder Schrempf <frieder.schrempf@exceet.de> wrote:
> Hello Boris,
>
> >>>> So shouldn't there be an spinand_die_select_op in the SPI NAND core that
> >>>> is executed when necessary and skipped if there's only one die.
> >>>
> >>> Sure, I was arguing against a ->select_chip() at the generic NAND
> >>> level. That's something you can add in the SPI NAND framework.
>
> I added an op to send the die selection command and call it, where I
> think it is needed: [1]
>
> Accessing both dies on the Winbond SPI NAND works fine like this.
Okay, I'll have a look.
>
> While running tests I came across some problems:
>
> * On accessing the BBT in RAM via nanddev_bbt_[set/get]_block_status,
> the calculation of position and offset seems to be wrong.
> My fix is here: [2]
Indeed.
>
> * On calculating the row address for read/program/erase via
> nanddev_pos_to_row, it seems like the eraseblock_addr_shift is wrong.
My version was incorrect, but yours is not good either :-), should
be:
nand->rowconv.eraseblock_addr_shift =
fls(memorg->pages_per_eraseblock - 1);
otherwise it doesn't work when the number of pages per block is not a
power of 2, and that can happen :-/.
>
> * Also, I'm not sure if the LUN should be taken into account when
> calculating the row address. At least when you select the LUN by issuing
> a separate command, the row address sent to the chip should only contain
> the page address.
The LUN id is part of the row address on parallel ONFI NANDs. Are you
sure what you're trying to access is actually a LUN?
The ONFI spec says:
"
LUN (logical unit number)
The minimum unit that can independently execute commands and report
status. There are one or more LUNs per NAND Target.
"
I suspect what you're trying to expose is a chip with 2 targets
(target is a synonym for die). If this is the case, then you should
have:
luns_per_target = 1;
ntargets = 2; /* ntargets <=> number of dies */
> But I'm not sure if that's the case in general, or if some code is
> needed to differentiate.
>
> See my changes of nanddev_pos_to_row here: [3]
>
> * I run into a mutex deadlock, when spinand_write_page fails (e.g.
> because of a bad block) as the lock is not released in such cases. See
> my fix here: [4]
This is a valid fix.
>
> With these fixes applied and as far as I can tell everything seems to
> work fine. I'll do some tests with UBI next and look into the ECC topic.
Okay cool.
I'll squash your fixes in the original commits and push an updated
version on my repo.
Thanks,
Boris
next prev parent reply other threads:[~2017-12-21 13:01 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-24 7:06 [PATCH v6 00/15] A SPI NAND framework under generic NAND framework Peter Pan
2017-05-24 7:06 ` [PATCH v6 01/15] mtd: nand: Rename nand.h into rawnand.h Peter Pan
2017-05-24 7:06 ` [PATCH v6 02/15] mtd: nand: move raw NAND related code to the raw/ subdir Peter Pan
2017-05-24 7:06 ` [PATCH v6 03/15] mtd: nand: add a nand.h file to expose basic NAND stuff Peter Pan
2017-05-29 20:14 ` Boris Brezillon
2017-05-24 7:07 ` [PATCH v6 04/15] mtd: nand: raw: prefix conflicting names with nandcchip instead of nand Peter Pan
2017-05-29 20:22 ` Boris Brezillon
2017-05-24 7:07 ` [PATCH v6 05/15] mtd: nand: raw: create struct rawnand_device Peter Pan
2017-05-29 21:05 ` Boris Brezillon
2017-05-24 7:07 ` [PATCH v6 06/15] mtd: nand: raw: make BBT code more generic Peter Pan
2017-05-24 7:07 ` [PATCH v6 07/15] mtd: nand: move BBT code to drivers/mtd/nand/ Peter Pan
2017-05-24 7:07 ` [PATCH v6 08/15] mtd: nand: Add the page iterator concept Peter Pan
2017-05-29 21:12 ` Boris Brezillon
2017-05-24 7:07 ` [PATCH v6 09/15] mtd: nand: make sure mtd_oob_ops consistent in bbt Peter Pan
2017-05-29 21:06 ` Boris Brezillon
2017-05-24 7:07 ` [PATCH v6 10/15] nand: spi: add basic blocks for infrastructure Peter Pan
2017-05-29 21:51 ` Boris Brezillon
2017-05-31 7:02 ` Peter Pan 潘栋 (peterpandong)
2017-05-31 21:45 ` Cyrille Pitchen
2017-06-01 7:24 ` Boris Brezillon
2017-05-24 7:07 ` [PATCH v6 11/15] nand: spi: add basic operations support Peter Pan
2017-05-29 22:11 ` Boris Brezillon
2017-05-31 6:51 ` Peter Pan 潘栋 (peterpandong)
2017-05-31 10:02 ` Boris Brezillon
2017-06-27 20:15 ` Boris Brezillon
2017-06-28 9:41 ` Arnaud Mouiche
2017-06-28 11:32 ` Boris Brezillon
2017-06-29 5:45 ` Peter Pan 潘栋 (peterpandong)
2017-06-29 6:07 ` Peter Pan 潘栋 (peterpandong)
2017-06-29 7:05 ` Arnaud Mouiche
2017-10-11 13:35 ` Boris Brezillon
2017-10-12 1:28 ` Peter Pan
2017-05-24 7:07 ` [PATCH v6 12/15] nand: spi: Add bad block support Peter Pan
2017-05-24 7:07 ` [PATCH v6 13/15] nand: spi: add Micron spi nand support Peter Pan
2017-05-24 7:07 ` [PATCH v6 14/15] nand: spi: Add generic SPI controller support Peter Pan
2017-05-24 7:07 ` [PATCH v6 15/15] MAINTAINERS: Add SPI NAND entry Peter Pan
2017-05-29 20:59 ` [PATCH v6 00/15] A SPI NAND framework under generic NAND framework Boris Brezillon
2017-12-04 13:32 ` Frieder Schrempf
2017-12-04 14:05 ` Boris Brezillon
2017-12-05 1:35 ` Peter Pan 潘栋 (peterpandong)
2017-12-05 12:58 ` Boris Brezillon
2017-12-05 13:03 ` Boris Brezillon
2017-12-12 9:58 ` Frieder Schrempf
2017-12-13 21:27 ` Boris Brezillon
2017-12-14 6:15 ` Peter Pan
2017-12-14 7:50 ` Boris Brezillon
2017-12-14 8:06 ` Peter Pan
2017-12-14 14:39 ` Frieder Schrempf
2017-12-14 14:43 ` Frieder Schrempf
2017-12-14 15:38 ` Boris Brezillon
2017-12-15 1:08 ` Peter Pan
2017-12-15 1:21 ` Peter Pan
2017-12-21 11:48 ` Frieder Schrempf
2017-12-21 13:01 ` Boris Brezillon [this message]
2017-12-21 13:54 ` Frieder Schrempf
2017-12-22 0:49 ` Peter Pan
2017-12-22 6:37 ` Peter Pan
2017-12-22 8:28 ` Boris Brezillon
2017-12-22 13:51 ` Boris Brezillon
2018-01-02 2:51 ` Peter Pan
2018-01-03 16:46 ` Boris Brezillon
2018-01-04 2:01 ` Peter Pan
2018-01-08 22:07 ` Boris Brezillon
2017-12-15 2:35 ` Peter Pan
2017-12-15 12:41 ` Boris Brezillon
[not found] <74cb9a07bd3247fd86002ef97509828f@SIWEX4H.sing.micron.com>
2017-05-31 6:20 ` Boris Brezillon
2017-05-31 6:34 ` Peter Pan 潘栋 (peterpandong)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171221140122.001bd196@bbrezillon \
--to=boris.brezillon@free-electrons.com \
--cc=frieder.schrempf@exceet.de \
--cc=linux-mtd@lists.infradead.org \
--cc=peterpandong@micron.com \
--cc=peterpansjtu@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox