From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1eydOV-0001k7-0k for linux-mtd@lists.infradead.org; Wed, 21 Mar 2018 13:03:25 +0000 From: Miquel Raynal To: Boris Brezillon , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut Cc: linux-mtd@lists.infradead.org, Kamal Dasu , Masahiro Yamada , Miquel Raynal Subject: [PATCH v2 15/16] mtd: rawnand: lpc32xx_slc: fix and enhance the probe function error path Date: Wed, 21 Mar 2018 14:01:56 +0100 Message-Id: <20180321130157.9524-16-miquel.raynal@bootlin.com> In-Reply-To: <20180321130157.9524-1-miquel.raynal@bootlin.com> References: <20180321130157.9524-1-miquel.raynal@bootlin.com> List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , An error after nand_scan_tail() should trigger a nand_cleanup(). The helper mtd_device_parse_register() returns an error code that should be checked and nand_cleanup() called accordingly. Also prepare the migration of the lpc32xx_slc driver to use nand_scan() by cleaning the error path in the probe function. Signed-off-by: Miquel Raynal --- drivers/mtd/nand/raw/lpc32xx_slc.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/nand/raw/lpc32xx_slc.c b/drivers/mtd/nand/raw/lpc32xx_slc.c index 5f7cc6da0a7f..143e1ec3a90a 100644 --- a/drivers/mtd/nand/raw/lpc32xx_slc.c +++ b/drivers/mtd/nand/raw/lpc32xx_slc.c @@ -831,11 +831,11 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) if (IS_ERR(host->clk)) { dev_err(&pdev->dev, "Clock failure\n"); res = -ENOENT; - goto err_exit1; + goto release_gpio; } res = clk_prepare_enable(host->clk); if (res) - goto err_exit1; + goto release_gpio; /* Set NAND IO addresses and command/ready functions */ chip->IO_ADDR_R = SLC_DATA(host->io_base); @@ -874,19 +874,19 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) GFP_KERNEL); if (host->data_buf == NULL) { res = -ENOMEM; - goto err_exit2; + goto release_clk; } res = lpc32xx_nand_dma_setup(host); if (res) { res = -EIO; - goto err_exit2; + goto release_clk; } /* Find NAND device */ res = nand_scan_ident(mtd, 1, NULL); if (res) - goto err_exit3; + goto release_dma; /* OOB and ECC CPU and DMA work areas */ host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE); @@ -920,21 +920,23 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) */ res = nand_scan_tail(mtd); if (res) - goto err_exit3; + goto release_dma; mtd->name = "nxp_lpc3220_slc"; res = mtd_device_register(mtd, host->ncfg->parts, host->ncfg->num_parts); - if (!res) - return res; + if (res) + goto cleanup_nand; - nand_release(mtd); + return 0; -err_exit3: +cleanup_nand: + nand_cleanup(chip); +release_dma: dma_release_channel(host->dma_chan); -err_exit2: +release_clk: clk_disable_unprepare(host->clk); -err_exit1: +release_gpio: lpc32xx_wp_enable(host); return res; -- 2.14.1