From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fMUnT-0007Fc-I8 for linux-mtd@lists.infradead.org; Sat, 26 May 2018 08:43:43 +0000 Date: Sat, 26 May 2018 10:43:05 +0200 From: Miquel Raynal To: Abhishek Sahu Cc: Boris Brezillon , David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Cyrille Pitchen , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja Subject: Re: [PATCH v3 06/16] mtd: rawnand: qcom: use the ecc strength from device parameter Message-ID: <20180526104305.6f957db9@xps13> In-Reply-To: <1527250904-21988-7-git-send-email-absahu@codeaurora.org> References: <1527250904-21988-1-git-send-email-absahu@codeaurora.org> <1527250904-21988-7-git-send-email-absahu@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi Abhishek, On Fri, 25 May 2018 17:51:34 +0530, Abhishek Sahu wrote: > Currently the driver uses the ECC strength specified in DT. > The QPIC/EBI2 NAND supports 4 or 8-bit ECC correction. The same > kind of board can have different NAND parts so use the ECC > strength from device parameters if it is not specified in DT. >=20 > Signed-off-by: Abhishek Sahu > --- > * Changes from v2: > NONE Yes you did change things: - s/<< 2/* 4/ - updated the cwperpage location - the block handling the ecc-step-size property has been removed in a previous patch Please be careful with that, it is time consuming to review the patches all over again. >=20 > * Changes from v1: >=20 > 1. Removed the custom logic and used the helper fuction. >=20 > drivers/mtd/nand/raw/qcom_nandc.c | 29 +++++++++++++++++++++-------- > 1 file changed, 21 insertions(+), 8 deletions(-) >=20 > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qco= m_nandc.c > index b538390..7377923 100644 > --- a/drivers/mtd/nand/raw/qcom_nandc.c > +++ b/drivers/mtd/nand/raw/qcom_nandc.c > @@ -2315,19 +2315,39 @@ static int qcom_nand_ooblayout_free(struct mtd_in= fo *mtd, int section, > .free =3D qcom_nand_ooblayout_free, > }; > =20 > +static int > +qcom_nandc_calc_ecc_bytes(int step_size, int strength) > +{ > + return strength =3D=3D 4 ? 12 : 16; > +} > +NAND_ECC_CAPS_SINGLE(qcom_nandc_ecc_caps, qcom_nandc_calc_ecc_bytes, > + NANDC_STEP_SIZE, 4, 8); > + > static int qcom_nand_host_setup(struct qcom_nand_host *host) > { > struct nand_chip *chip =3D &host->chip; > struct mtd_info *mtd =3D nand_to_mtd(chip); > struct nand_ecc_ctrl *ecc =3D &chip->ecc; > struct qcom_nand_controller *nandc =3D get_qcom_nand_controller(chip); > - int cwperpage, bad_block_byte; > + int cwperpage, bad_block_byte, ret; > bool wide_bus; > int ecc_mode =3D 1; > =20 > /* controller only supports 512 bytes of data in each step */ > ecc->size =3D NANDC_STEP_SIZE; > wide_bus =3D chip->options & NAND_BUSWIDTH_16 ? true : false; > + cwperpage =3D mtd->writesize / NANDC_STEP_SIZE; > + > + /* > + * Each CW has 4 available OOB bytes which will be protected with ECC > + * so remaining bytes can be used for ECC. > + */ > + ret =3D nand_ecc_choose_conf(chip, &qcom_nandc_ecc_caps, > + mtd->oobsize - cwperpage * 4); Nitpick: could you add parenthesis around (cwperpage * 4) just for clarity. > + if (ret) { > + dev_err(nandc->dev, "No valid ECC settings possible\n"); > + return ret; > + } > =20 > if (ecc->strength >=3D 8) { > /* 8 bit ECC defaults to BCH ECC on all platforms */ > @@ -2396,7 +2416,6 @@ static int qcom_nand_host_setup(struct qcom_nand_ho= st *host) > =20 > mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops); > =20 > - cwperpage =3D mtd->writesize / ecc->size; > nandc->max_cwperpage =3D max_t(unsigned int, nandc->max_cwperpage, > cwperpage); > =20 > @@ -2412,12 +2431,6 @@ static int qcom_nand_host_setup(struct qcom_nand_h= ost *host) > * for 8 bit ECC > */ > host->cw_size =3D host->cw_data + ecc->bytes; > - > - if (ecc->bytes * (mtd->writesize / ecc->size) > mtd->oobsize) { > - dev_err(nandc->dev, "ecc data doesn't fit in OOB area\n"); > - return -EINVAL; > - } > - > bad_block_byte =3D mtd->writesize - host->cw_size * (cwperpage - 1) + 1; > =20 > host->cfg0 =3D (cwperpage - 1) << CW_PER_PAGE Once corrected: Acked-by: Miquel Raynal Thanks, Miqu=C3=A8l