From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Ladislav Michl <ladis@linux-mips.org>
Cc: linux-mtd@lists.infradead.org,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>
Subject: Re: atmel-nand-controller: NAND chip selects?
Date: Mon, 11 Jun 2018 13:21:31 +0200 [thread overview]
Message-ID: <20180611132131.4f175aea@bbrezillon> (raw)
In-Reply-To: <20180611110425.GA4059@lenoch>
On Mon, 11 Jun 2018 13:04:25 +0200
Ladislav Michl <ladis@linux-mips.org> wrote:
> Consider there are more NAND chips connected to the same lines and only nCE
> (connected to GPIO line one per each chip) is used to select them.
> How is driver supposed to work in such situation?
> Common memory region cannot be requested multiple times as well as the
> same gpio for R/B cannot be requested.
I thought you could request several times the same GPIO if it's in input
mode, but maybe I'm wrong.
> Something as davinci_nand for
> memory region? Use 'ranges' property? How should one express in DT gpio
> is shared between child nodes?
For both problems, the solution is to reserve the resources at the NAND
controller level instead of the NAND level. It's pretty easy for the CS
memory range, because the driver can easily detect when the same CS is
used by different NAND chips. It's a bit more complicated for the R/B
pins.
next prev parent reply other threads:[~2018-06-11 11:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-11 11:04 atmel-nand-controller: NAND chip selects? Ladislav Michl
2018-06-11 11:21 ` Boris Brezillon [this message]
2018-06-11 14:42 ` Ladislav Michl
2018-06-11 18:22 ` Boris Brezillon
2018-06-11 20:30 ` Boris Brezillon
2018-06-11 21:31 ` Ladislav Michl
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