From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Sam Lefebvre <sam.lefebvre@essensium.com>
Cc: linux-mtd@lists.infradead.org,
Arnout Vandecapelle <arnout@mind.be>,
Dries Staelens <dries.staelens@barco.com>,
Han Xu <han.xu@nxp.com>
Subject: Re: [PATCH 07/13] mtd: rawnand: gpmi: set aggregate ready/busy signalling
Date: Mon, 18 Jun 2018 17:00:08 +0200 [thread overview]
Message-ID: <20180618170008.791d1b1b@xps13> (raw)
In-Reply-To: <20180426154134.8270-8-sam.lefebvre@essensium.com>
Hello Han,
Could we have your input on this patch, please?
On Thu, 26 Apr 2018 17:41:28 +0200, Sam Lefebvre
<sam.lefebvre@essensium.com> wrote:
> The GPMI block by default decouples the ready/busy signal (which is
> shared between all chip-selects) to separate internal signals per
> chip-select. However, since the gpmi-nand driver uses DMA0 for all
> chip-selects, DMA transfers will not be able to see the ready/busy
> status for any chip-select other than 0.
>
> Currently, this happens to work because nand_command() ends with an
> explicit nand_wait_ready() and the driver only sets up a single command
> in a DMA chain. nand_wait_ready() polls for the chip-select specific
> ready/busy status bit. Future patches, however, will set up a DMA chain
> with several commands, so these will have to wait correctly in the DMA
> chain itself.
>
> To fix this, set the GANGED_RDYBUSY bit in the control1 register. This
> ties all internal ready/busy signals together, so DMA0 will also see
> the ready/busy status of chip selects 1-2-3. It's a bit silly that this
> isn't implied in hardware by the DECOUPLE_CS bit.
>
> Signed-off-by: Sam Lefebvre <sam.lefebvre@essensium.com>
> Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
> Cc: Han Xu <han.xu@nxp.com>
> ---
> Tested on an i.MX6Q with two identical chips on CS0 and CS1.
> ---
> drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c | 3 +++
> drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h | 1 +
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c
> index 83697b8df871..1858afdb400d 100644
> --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c
> +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c
> @@ -193,6 +193,9 @@ int gpmi_init(struct gpmi_nand_data *this)
> */
> writel(BM_GPMI_CTRL1_DECOUPLE_CS, r->gpmi_regs + HW_GPMI_CTRL1_SET);
>
> + /* Aggregate ready busy signalling. */
> + writel(BM_GPMI_CTRL1_GANGED_RDYBUSY, r->gpmi_regs + HW_GPMI_CTRL1_SET);
> +
> gpmi_disable_clk(this);
> return 0;
> err_out:
> diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h b/drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h
> index d92bf32221ca..e341802c90ac 100644
> --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h
> +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-regs.h
> @@ -120,6 +120,7 @@
> #define BV_GPMI_CTRL1_WRN_DLY_SEL_7_TO_12NS 0x2
> #define BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY 0x3
>
> +#define BM_GPMI_CTRL1_GANGED_RDYBUSY (1 << 19)
> #define BM_GPMI_CTRL1_BCH_MODE (1 << 18)
>
> #define BP_GPMI_CTRL1_DLL_ENABLE 17
Thanks,
Miquèl
next prev parent reply other threads:[~2018-06-18 15:00 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-26 15:41 optimizing the nand read performance by reducing interrupts from 4 to 1 Sam Lefebvre
2018-04-26 15:41 ` [PATCH 01/13] mtd: nand: gpmi: drop dma_ops_type Sam Lefebvre
2018-04-26 15:41 ` [PATCH 02/13] mtd: nand: gpmi: pass buffer and len around Sam Lefebvre
2018-04-26 15:41 ` [PATCH 03/13] mtd: nand: gpmi: put only once used functions inline Sam Lefebvre
2018-04-26 15:41 ` [PATCH 04/13] mtd: nand: gpmi: remove direct_dma_map_ok from driver data struct Sam Lefebvre
2018-04-26 15:41 ` [PATCH 05/13] mtd: nand: gpmi: return valid value from bch_set_geometry() Sam Lefebvre
2018-04-26 15:41 ` [PATCH 06/13] mtd: nand: gpmi: remove unnecessary variables Sam Lefebvre
2018-04-26 15:41 ` [PATCH 07/13] mtd: rawnand: gpmi: set aggregate ready/busy signalling Sam Lefebvre
2018-06-18 15:00 ` Miquel Raynal [this message]
2018-04-26 15:41 ` [PATCH 08/13] mtd: rawnand: gpmi: return generated errors in gpmi_ecc_read_oob() Sam Lefebvre
2018-04-26 16:43 ` Boris Brezillon
2018-04-26 15:41 ` [PATCH 09/13] mtd: rawnand: gpmi: poll the BCH interrupt bit in start_dma_with_bch_irq() Sam Lefebvre
2018-04-26 16:49 ` Boris Brezillon
2018-04-26 15:41 ` [PATCH 10/13] mtd: rawnand: gpmi: instantiate cmdfunc Sam Lefebvre
2018-04-26 15:41 ` [PATCH 11/13] mtd: rawnand: gpmi: gpmi_nand_command(): simplification and formatting Sam Lefebvre
2018-04-26 15:41 ` [PATCH 12/13] mtd: rawnand: gpmi: issue two commands in a single DMA chain Sam Lefebvre
2018-04-26 15:41 ` [PATCH 13/13] mtd: rawnand: gmpi: chain gpmi_nand_command() with gpmi_ecc_read_page_data() Sam Lefebvre
2018-04-26 21:46 ` Boris Brezillon
2018-04-26 16:28 ` optimizing the nand read performance by reducing interrupts from 4 to 1 Boris Brezillon
2018-04-27 10:27 ` Sam Lefebvre
2018-04-27 12:09 ` Boris Brezillon
2018-04-26 20:07 ` Boris Brezillon
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